Silicon oxycarbide substrates for bonded silicon on insulator

• US 7,008,854 B2
• Filed: 05/21/2003
• Issued: 03/07/2006
• Est. Priority Date: 05/21/2003
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Forbes, Leonard
• Primary Examiner(s): Blum, David S.
• Application Number:
  US10/443,355
• Publication Number:
  US 20040232488A1
• Time in Patent Office: 1,021 Days
• Field of Search: 438/403, 438/406, 438/407, 438/423
• US Class Current: 438/403
• CPC Class Codes: H01L 21/76254 with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond

Abstract

A method for forming a semiconductor on insulator structure includes forming a semiconductor layer on an insulating substrate, where the substrate is a different material than the semiconductor layer, and has a coefficient of thermal expansion substantially equal to that of the semiconductor layer. The semiconductor layer can also be formed having a thickness such that, it does not yield due to temperature-induced strain at device processing temperatures. A silicon layer bonded to a silicon oxycarbide glass substrate provides a silicon on insulator wafer in which circuitry for electronic devices is fabricated.

Claims

1. A method for making a semiconductor on insulator structure comprising:

providing a silicon oxycarbide substrate; and

forming a semiconductor layer containing silicon above the silicon oxycarbide substrate, the silicon oxycarbide substrate being a different material than the semiconductor layer containing silicon, wherein the silicon oxycarbide substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer containing silicon.

2. The method of claim 1, wherein the method includes forming a silicon oxide layer coupling the semiconductor layer containing silicon to the silicon oxycarbide substrate.

3. The method of claim 1, wherein providing a silicon oxycarbide substrate includes providing a silicon oxycarbide substrate having a material composition including a carbon concentration of about 60% to 70%.

4. The method of claim 1, wherein forming a semiconductor layer containing silicon includes bonding a semiconductor layer containing silicon having a thickness such that the semiconductor layer containing silicon does not yield due to temperature-induced strain at device processing temperatures.

5. The method of claim 1, wherein providing an insulating substrate forming a semiconductor layer containing silicon includes forming a monocrystalline semiconductor layer containing silicon.

6. The method of claim 1, wherein forming a semiconductor layer above the insulating substrate includes bonding a silicon layer to the insulating substrate.

7. A method for making a semiconductor on insulator structure comprising:

providing an insulating substrate; and

forming a semiconductor layer above the insulating substrate, the insulating substrate being a different material than the semiconductor layer, wherein the insulating substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer, wherein providing an insulating substrate includes providing a silicon oxycarbide substrate having its carbon concentration adjusted to substantially match the coefficient of thermal expansion of the silicon oxycarbide substrate with that of the semiconductor layer.

8. The method of claim 7, wherein the method includes forming an insulator coupling the semiconductor layer to the silicon oxycarbide substrate.

9. The method of claim 7, wherein providing a silicon oxycarbide substrate includes providing the silicon oxycarbide substrate having a material composition including a carbon concentration of about 60% to 70%.

10. A method for making a semiconductor on insulator structure comprising:

providing a silicon oxycarbide substrate; and

performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate to provide a semiconductor layer bonded to the silicon oxycarbide substrate, wherein the silicon oxycarbide substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer.

11. The method of claim 10, wherein providing a silicon oxycarbide substrate includes providing a silicon oxycarbide substrate having its carbon concentration adjusted to substantially match a coefficient of thermal expansion of the semiconductor layer.

12. The method of claim 10, wherein performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate to provide a semiconductor layer includes providing the semiconductor layer having a thickness such that the semiconductor layer does not yield due to temperature-induced strain at device processing temperatures.

13. The method of claim 10, wherein performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate to provide a semiconductor layer bonded to the silicon oxycarbide substrate includes polishing an intermediate semiconductor layer provided by the bonding cut to thin the intermediate semiconductor layer.

14. The method of claim 10, wherein performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate includes performing a bonding cut process on a semiconductor wafer containing an oxide on a surface of the semiconductor wafer.

15. A method for forming an electronic device comprising:

bonding a semiconductor layer containing silicon to a silicon oxycarbide substrate, the silicon oxycarbide substrate being a different material than the semiconductor layer containing silicon, the silicon oxycarbide substrate having a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer containing silicon; and

forming circuitry in the semiconductor layer containing silicon.

16. The method of claim 15, wherein bonding a semiconductor layer containing silicon to a silicon oxycarbide substrate includes bonding a semiconductor layer containing silicon having a thickness such that the semiconductor layer containing silicon does not yield due to temperature-induced strain at device processing temperatures.

17. The method of claim 15, wherein bonding a semiconductor layer containing silicon to a silicon oxycarbide substrate includes thermal processing using plasma enhanced bonding.

18. A method for forming an electronic device comprising:

bonding a semiconductor layer to a substrate, the substrate being a different material than the semiconductor layer, the substrate having a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer; and

forming circuitry in the semiconductor layer, wherein bonding a semiconductor layer to a substrate includes bonding a semiconductor layer to a silicon oxycarbide substrate.

19. The method of claim 18, wherein bonding a semiconductor layer to a silicon oxycarbide substrate includes thermal processing using plasma enhanced bonding.

20. The method of claim 18, wherein forming circuitry in the semiconductor layer includes forming a fully depleted device using CMOS device technology.

21. A method for forming an electronic device comprising:

implanting ions into a silicon wafer;

adjusting a carbon concentration forming a silicon oxycarbide substrate having a coefficient of thermal expansion substantially matched to that of the silicon wafer layer;

attaching the silicon wafer to the silicon oxycarbide substrate forming an attached structure;

thermally processing the silicon wafer attached to the silicon oxycarbide substrate to cut a portion of the silicon wafer from the attached structure;

processing the attached structure to provide a silicon layer having a thickness ranging from about 0.1 microns to about 10 microns; and

forming circuitry in a silicon layer.

22. The method of claim 21, wherein forming circuitry in the silicon layer includes forming fully depleted devices using CMOS device technology.

23. The method of claim 21, wherein forming circuitry in the silicon layer includes forming bipolar transistors in the silicon layer.

24. A method for forming an electronic device comprising:

performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate to provide a silicon layer bonded to the silicon oxycarbide substrate, the silicon oxycarbide substrate having a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the silicon wafer; and

forming circuitry in the silicon layer.

25. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate to provide a silicon layer includes providing the silicon layer with a thickness such that the silicon layer does not yield due to temperature-induced strain at device processing temperatures.

26. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate includes providing a silicon oxycarbide glass sheet that has been polished and cutting the silicon oxycarbide glass sheet into a wafer size pattern to form the silicon oxycarbide substrate.

27. The method of claim 24, wherein the method further includes providing a silicon oxycarbide glass sheet that has been synthesized by prolysis of gel sheets obtained from a methyl-modified silica sol containing colloidal silica.

28. The method of claim 27, wherein providing a silicon oxycarbide glass sheet includes providing a silicon oxycarbide glass sheet that has been synthesized by prolysis of gel sheets in an inert atmosphere at a temperature ranging from about 900°

C. to about 1200°

C.

29. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate includes bonding the silicon wafer to the silicon oxycarbide substrate by plasma enhanced bonding to cut the silicon wafer.

30. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate includes bonding the silicon wafer to the silicon oxycarbide substrate at a temperature ranging from about 400°

C. to 600°

C. to cut the silicon wafer providing an intermediate silicon layer bonded to the silicon oxycarbide substrate.

31. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate includes bonding the silicon wafer to the silicon oxycarbide substrate to cut the silicon wafer providing an intermediate silicon layer bonded to the silicon oxycarbide substrate and subjecting the intermediate silicon layer bonded to the silicon oxycarbide substrate to temperatures ranging from 800°

C. to 1000°

C.

32. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate includes bonding the silicon wafer to the silicon oxycarbide substrate to cut the silicon wafer providing an intermediate silicon layer bonded to the silicon oxycarbide substrate and annealing the intermediate silicon layer bonded to the silicon oxycarbide substrate by laser assisted annealing.

33. The method of claim 24, wherein performing a bonding cut process on a silicon wafer and a silicon oxycarbide substrate to provide a silicon layer includes polishing an intermediate silicon layer formed by the bonding cut process.

34. The method of claim 33, wherein polishing an intermediate silicon layer formed by the bonding cut process includes polishing the intermediate silicon layer to provide the silicon layer having a thickness ranging from about 0.1 microns to about 10 microns.

35. The method of claim 24, wherein forming circuitry in the silicon layer includes forming fully depleted devices using CMOS device technology.

36. The method of claim 24, wherein forming circuitry in the silicon layer includes patterning the silicon layer by trench isolation in a partially depleted CMOS process.

37. The method of claim 36, wherein patterning the silicon layer by trench isolation in a partially depleted CMOS process includes performing the partially depleted CMOS process for devices with floating bodies.

38. The method of claim 24, wherein forming circuitry in the silicon layer includes forming bipolar transistors in the silicon layer.

39. A method for fabricating a transistor comprising:

providing a semiconductor on insulator structure formed by a method including;

conditioning a semiconductor wafer, the semiconductor wafer containing silicon; and

performing a bonding cut process on a the semiconductor wafer and a silicon oxycarbide substrate to provide a semiconductor layer bonded to the substrate, the silicon oxycarbide substrate being a different material than the semiconductor layer, wherein the silicon oxycarbide substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer; and

forming a transistor in the semiconductor on insulator structure.

40. The method of claim 39, wherein performing a bonding cut process on the semiconductor wafer and a silicon oxycarbide substrate to provide a semiconductor layer includes providing the semiconductor layer having a thickness such that the semiconductor layer does not yield due to temperature-induced strain at device processing temperatures.

41. The method of claim 39, wherein performing a bonding cut process on the semiconductor wafer and a silicon oxycarbide substrate to provide a semiconductor layer bonded to the substrate includes polishing an intermediate semiconductor layer provided by the bonding cut to thin the intermediate semiconductor layer.

42. The method of claim 39, wherein conditioning a semiconductor wafer includes forming an insulator layer on a surface of the semiconductor wafer.

43. A method for fabricating a transistor comprising:

providing a semiconductor on insulator structure formed by a method including;

conditioning a semiconductor wafer; and

performing a bonding cut process on a semiconductor wafer and a substrate to provide a semiconductor layer bonded to the substrate, the substrate being a different material than the semiconductor layer, wherein the substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor layer; and

forming a transistor in the semiconductor on insulator structure, wherein performing a bonding cut process on a semiconductor wafer and a substrate to provide a semiconductor layer bonded to the substrate includes performing a bonding cut process on a semiconductor wafer and a silicon oxycarbide substrate.

44. The method of claim 43, wherein performing a bonding cut process on a semiconductor wafer and a silicon oxycarbide substrate includes performing a bonding cut process on a semiconductor wafer and a silicon oxycarbide substrate having a carbon concentration of about 60% to 70%.

45. The method of claim 43, wherein conditioning a semiconductor wafer includes forming an insulator on the semiconductor wafer.

46. A method for fabricating a memory device comprising:

providing a silicon on insulator structure formed by a method including;

conditioning a silicon wafer;

forming a silicon oxycarbide substrate by adjusting its carbon concentration to substantially match a coefficient of thermal expansion of the silicon oxycarbide substrate to that of the silicon wafer layer; and

performing a bonding cut process on the silicon wafer and the silicon oxycarbide substrate to provide a silicon layer bonded to the silicon oxycarbide substrate, the silicon layer having a thickness ranging from about 0.1 microns to about 10 microns; and

forming a memory circuit in the silicon on insulator structure.

47. The method of claim 46, wherein forming a silicon oxycarbide substrate further includes providing a silicon oxycarbide glass sheet that has been synthesized by prolysis of gel sheets obtained from a methyl-modified silica sol containing colloidal silica.

48. The method of claim 46, wherein performing a bonding cut process on the silicon wafer and a silicon oxycarbide substrate to provide a silicon layer bonded to the silicon oxycarbide substrate includes polishing an intermediate semiconductor layer provided by the bonding cut to thin the intermediate semiconductor layer.

49. The method of claim 46, wherein conditioning a silicon wafer includes providing a silicon wafer having a silicon oxide layer on a surface of the silicon wafer.

50. The method of claim 46, wherein conditioning a silicon wafer includes providing implanting hydrogen ions into the silicon wafer.

51. A method for manufacturing an electronic system comprising:

providing a processor; and

coupling a memory device to the processor, the memory device formed by a method including;

providing a silicon on insulator structure formed by a method including;

providing a silicon oxycarbide substrate;

forming an insulator on a silicon wafer; and

performing a bonding cut process on the silicon wafer having the insulator and the silicon oxycarbide substrate to provide a silicon layer bonded to the silicon oxycarbide substrate, the silicon oxycarbide substrate having a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the silicon wafer; and

forming a memory circuit in the silicon on insulator structure.

52. The method of claim 51, wherein the method further includes forming the silicon layer to have a thickness such that the silicon layer does not yield due to temperature-induced strain at device processing temperatures.

53. The method of claim 51, wherein forming an insulator on a silicon wafer includes forming silicon oxide on the silicon wafer.

54. The method of claim 51, wherein performing a bonding cut process on the silicon wafer having the insulator and the silicon oxycarbide substrate to provide a silicon layer bonded to the substrate includes polishing an intermediate silicon layer provided by the bonding cut to provide the silicon layer having a thickness ranging from about 0.1 microns to about 10 microns.

55. A method for manufacturing an electronic system comprising:

providing a processor; and

coupling a memory device to the processor, the memory device formed by a method including;

providing a silicon on insulator structure formed by a method including;

providing a substrate; and

performing a bonding cut process on a silicon wafer and the substrate to provide a silicon layer bonded to the substrate, the substrate being a different material than the silicon wafer, the substrate having a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the silicon wafer; and

forming a memory circuit in the silicon on insulator structure, wherein providing a substrate includes providing a silicon oxycarbide substrate.

56. The method of claim 55, wherein forming a memory circuit includes forming a dynamic random access memory.

57. The method of claim 55, wherein performing a bonding cut process includes implanting ions into the silicon wafer.

58. A method of manufacturing comprising:

providing a silicon oxycarbide substrate;

performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate to provide a semiconductor layer bonded to the silicon oxycarbide substrate, the semiconductor wafer containing silicon, the silicon oxycarbide substrate being a different material than the semiconductor wafer, wherein the silicon oxycarbide substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor wafer; and

using a remaining portion of the semiconductor wafer resulting from the bonding cut to bond a second semiconductor layer to another substrate.

59. The method of claim 58, wherein performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate to provide a semiconductor layer includes performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate to provide the semiconductor layer having a thickness such that the semiconductor layer does not yield due to temperature-induced strain at device processing temperatures.

60. The method of claim 58, wherein performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate includes performing a bonding cut process on a silicon wafer and the silicon oxycarbide substrate.

61. The method of claim 58, wherein performing a bonding cut process on a semiconductor wafer and the silicon oxycarbide substrate includes performing a bonding cut process on the silicon oxycarbide substrate and the semiconductor wafer, the semiconductor wafer including a silicon oxide layer.

62. The method of claim 58, wherein the method further includes forming electronic circuitry in the second semiconductor layer.

63. The method of claim 58, wherein the method further includes forming electronic circuitry in the semiconductor layer bonded to the substrate.

64. A method of manufacturing comprising:

providing a substrate;

performing a bonding cut process on a semiconductor wafer and the substrate to provide a semiconductor layer bonded to the substrate, the substrate being a different material than the semiconductor wafer, wherein the substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor wafer; and

using a remaining portion of the semiconductor wafer resulting from the bonding cut to bond a second semiconductor layer to another substrate, wherein providing a substrate includes providing a silicon oxycarbide substrate.

65. The method of claim 64, wherein performing a bonding cut process includes performing a bonding cut process on a semiconductor wafer having an insulator layer.

66. The method of claim 64, wherein performing a bonding cut process includes performing a bonding cut process at a substrate temperature ranging from about 400°

C. to about 600°

C.

67. A method of manufacturing comprising:

providing a substrate;

performing a bonding cut process on a semiconductor wafer and the substrate to provide a semiconductor layer bonded to the substrate, the substrate being a different material than the semiconductor wafer, wherein the substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor wafer; and

using a remaining portion of the semiconductor wafer resulting from the bonding cut to bond a second semiconductor layer to another substrate, wherein providing a substrate includes providing a silicon oxycarbide glass sheet that has been synthesized by prolysis of gel sheets obtained from a methyl-modified silica sol containing colloidal silica, polishing the silicon oxycarbide glass sheet, and cutting the silicon oxycarbide glass sheet into a wafer size pattern to form a silicon oxycarbide substrate.

68. The method of claim 67, wherein providing a silicon oxycarbide substrate includes providing the silicon oxycarbide substrate having a material composition including a carbon concentration of about 60% to 70%.

69. The method of claim 67, wherein performing a bonding cut process includes performing a bonding cut process on a semiconductor wafer having an insulator layer.

70. A method of manufacturing comprising:

providing a substrate;

performing a bonding cut process on a semiconductor wafer and the substrate to provide a semiconductor layer bonded to the substrate, the substrate being a different material than the semiconductor wafer, wherein the substrate has a coefficient of thermal expansion that is approximately equal to a coefficient of thermal expansion for the semiconductor wafer; and

using a remaining portion of the semiconductor wafer resulting from the bonding cut to bond a second semiconductor layer to another substrate, wherein using a remaining portion of the semiconductor wafer resulting from the bonding cut to bond a second semiconductor layer to another substrate includes providing a silicon oxycarbide substrate.

71. The method of claim 70, wherein the method includes forming an information handling system.

72. The method of claim 70, wherein the method includes forming electronic circuitry in the semiconductor layer bonded to the substrate.