Method and apparatus for increasing the linearity and bandwidth of an amplifier

• US 7,009,452 B2
• Filed: 10/16/2003
• Issued: 03/07/2006
• Est. Priority Date: 10/16/2003
• Status: Active Grant

• Current Assignee: Marvell Asia Pte Limited (Marvell Technology Group Limited)
• Original Assignee: SolarFlare Communications Incorporated (Advanced Micro Devices, Inc.)
• Inventors: Grilo, Jorge Alberto
• Primary Examiner(s): Choe, Henry
• Application Number:
  US10/688,005
• Publication Number:
  US 20050083130A1
• Time in Patent Office: 873 Days
• Field of Search: 330/288, 330/264, 330/265, 330/269, 323/315, 323/316
• US Class Current: 330/288
• CPC Class Codes: H03F 1/3205 in field-effect transistor amplifiers
• CPC Class Codes: H03F 1/483 with field-effect transistors
• CPC Class Codes: H03F 2200/36 the amplifier comprising means for increasing the bandwidth
• CPC Class Codes: H03F 2203/45512 the FBC comprising one or more capacitors, not being switched capacitors, and being coupled between the LC and the IC
• CPC Class Codes: H03F 3/45273 Mirror types
• CPC Class Codes: H03F 3/45475 using IC blocks as the active amplifying circuit

Abstract

A method and apparatus is disclosed for improving high frequency performance of an amplifier, such as for example, a current mirror. In one embodiment, a delay element is introduced in a current mirror signal path to account for signal propagation delay that may exist in one or more alternative signal paths. The delay element maintains desired phase alignment at a cascade node of the current mirror thereby establishing, in one embodiment, the cascode node (V_c) in an AC ground state. To extend current mirror high frequency capability an embodiment is disclosed having cross-coupled capacitors, active elements, or one or more other devices configured to provide positive feedback to one or more current mirror inputs. The positive feedback may be selectively configured to increase the operational bandwidth of the current mirror.

Claims

1. A high frequency current mirror comprising:

a current mirror having an input node, a cascode node, and an output node configured to provide an output signal from the current mirror;

a first current mirror path between the input node and the cascode node;

a second current mirror path between the input node and the cascode node;

at least one semiconductor device in the first current mirror path; and

at least one semiconductor device in the second current mirror path;

a device configured to modify the transfer function of either of the first path or the second path to thereby increase the bandwidth of a current mirror by maintaining an AC ground at the cascode node.

2. The current mirror of claim 1, wherein the at least one semiconductor device in the first current mirror path comprises a field effect transistor and at least one semiconductor device in the second current mirror path comprises at a field effect transistor.

3. The current mirror of claim 1, wherein the device comprises delay element.

4. The current mirror of claim 1, further comprising a device in both the first current mirror path or the second current mirror path configured to maintain an AC ground at the output.

5. The current mirror of claim 3, wherein the delay element comprises a resistor-capacitor network.

6. The current mirror of claim 5, wherein the capacitance of the resistor-capacitor network is generated by a conductor trace, a semiconductor device input capacitance, or both.

7. A high frequency amplifier comprising:

an input configured to receive an input signal;

a node configured to divide the input signal into a first signal on a first signal path and a second signal on a second signal path, wherein the first signal path comprises a lesser number of semiconductor junctions than the second signal path;

a V_c node connected to both the first signal path and the second signal path; and

a device in the first path configured to delay the first signal to thereby maintain the first signal out of phase with the second signal at the V_c node to thereby create an AC ground at the V_c node.

8. The amplifier of claim 7, wherein the delay comprises a resistor-capacitor network.

9. The amplifier of claim 7, wherein the delay comprises a resistor and the first path is configured to establish capacitance.

10. The amplifier of claim 7, wherein the input signal is at a frequency of greater than 300 MHz.

11. A method for improving high frequency operation of an amplifier comprising:

providing an amplifier having an at least one input, at least one cascade node, and at least one output, wherein there exists two or more signal paths between the at least one input and the at least one cascade node; and

connecting a delay in at least one of the two or more signal paths, the delay configured to modify the transfer function of a signal passing through the at least one signal path to maintain an AC ground at at least one of the cascade nodes.

12. The method of claim 11, wherein the delay comprises a semiconductor device.

13. The method of claim 11, wherein the amplifier comprises at least one current mirror.