Fibre channel arbitrated loop bufferless switch circuitry to increase bandwidth without significant increase in cost

• US 7,009,985 B2
• Filed: 01/21/2003
• Issued: 03/07/2006
• Est. Priority Date: 01/23/1997
• Status: Expired due to Term

• Current Assignee: Avago Technologies General IP PTE Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Black, Alistair D., Chan, Kurt
• Primary Examiner(s): NGUYEN, STEVEN H D
• Application Number:
  US10/349,045
• Publication Number:
  US 20030108060A1
• Time in Patent Office: 1,141 Days
• Field of Search: 370400-409, 370/360, 370/389, 370/462, 370/422, 370/461, 398/45, 398/52, 710/317
• US Class Current: 370/403
• CPC Class Codes: H04L 12/40084 Bus arbitration
• CPC Class Codes: H04L 12/4625 Single bridge functionality, e.g. connection of two networks over a single bridge
• CPC Class Codes: H04L 12/4637 Interconnected ring systems
• CPC Class Codes: H04L 49/103 using a shared central buffer; using a shared memory
• CPC Class Codes: H04L 49/15 Interconnection of switching modules
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/30 Peripheral units, e.g. input or output ports
• CPC Class Codes: H04L 49/357 Fibre channel switches
• CPC Class Codes: H04L 49/40 Constructional details, e.g. power supply, mechanical construction or backplane
• CPC Class Codes: H04N 21/4341 Demultiplexing of audio and video streams

Abstract

A switch, switched architecture and process for transferring data through an FCAL switch is disclosed. The switch uses multiple switch control circuits each coupled to one FCAL network and all connected to a crossbar switch. The switch control circuits are coupled together by a protocol bus for coordination purposes. Local conversations can occur on each FCAL loop and crossing conversations through the switch can occur concurrently. The OPN primitive is used to establish the connection before any data is transferred thereby eliminating the need for buffer memory in the switch control circuits. The destination address of each OPN is used to address a lookup table in each switch control circuit to determine if the destination node is local. If not, the destination is looked up and a connection request made on the protocol bus. If the remote port is not busy, it sends a reply which causes both ports to establish a data path through the backplane crossbar switch.

Claims

1. A switch apparatus comprising a plurality of integrated circuits each comprising a slice of a fiber channel arbitrated loop (FCAL) switch and coupled together to form said FCAL switch, each integrated circuit having a plurality of port circuits, each port circuit having a buffer memory to store data, each said integrated circuit also comprising a portion of a distributed, scaleable crossbar switch such that any number of said integrated circuit slices are coupled together to form said FCAL switch which has as many ports as are necessary for the size of network in which the switch is to be used, limited only by the available FCAL address space of 128 nodes,

wherein said crossbar switch is structured such that when all of said integrated circuits are coupled together, a complete crossbar switch is formed, said integrated circuit or circuits including a lookup table and circuitry to use the destination address of a primitive arriving from a local FCAL net coupled to a port circuit to access said lookup table to determine the local FCAL net and port coupled to a destination node having that destination address and to determine whether to make connections so as to forward the primitive back onto the local FCAL net from which the primitive arrived and keep any subsequent data frames and primitives on the local FCAL net or to forward the primitive to another port on the same integrated circuit for coupling onto its FCAL net and transmit subsequent data frames and primitives between the FCAL net coupled to the port which received the primitive and the FCAL net coupled to another port on the same integrated circuit having the destination node identified in said primitive or to make connections through said crossbar switch to forward said primitive to a port on another integrated circuit and an FCAL net coupled to said port and said destination node and to transfer any subsequent data frames and primitives between said FCAL nets coupled to different integrated circuits through said crossbar switch and the ports coupled to said FCAL nets.

2. The switch of claim 1 wherein said port circuits and crossbar switch circuitry are structured so as to cooperate to implement dual simplex communications.

3. The switch of claim 1 wherein said switch contains a memory for storing configuration data and wherein said configuration data contains programmable data indicating whether or not dual simplex communication is allowed, and wherein said port circuits and crossbar switch circuitry are structured so as to be capable of cooperating to implement dual simplex communications when said configuration data indicates dual simplex communication is allowed.

4. A switch apparatus comprising:

a plurality of integrated circuits, wherein each integrated circuit includes a slice of a fiber channel arbitrated loop (FCAL) switch and are coupled to form said FCAL switch;

said each integrated circuit including a plurality of port circuits, wherein each port circuit includes a buffer memory that is bypassed during a connection request within said FCAL switch; and

said each integrated circuit also includes a portion of a distributed, scaleable crossbar switch, wherein a number of integrated circuit slices are coupled to form said FCAL switch having a plurality of ports,

wherein said plurality of ports correspond to a size of a network for the switch to be used, and wherein said plurality of ports is limited by an available FCAL address space of 128 nodes,

wherein said crossbar switch is structured such that when all of said integrated circuits are coupled together, a complete crossbar switch is formed, said integrated circuit or circuits including a lookup table and circuitry to use the destination address of a primitive arriving from a local FCAL net coupled to a port circuit to access said lookup table to determine the local FCAL net and port coupled to a destination node having that destination address and to determine whether to make connections so as to forward the primitive back onto the local FCAL net from which the primitive arrived and keep any subsequent data frames and primitives on the local FCAL net or to forward the primitive to another port on the same integrated circuit for coupling onto its FCAL net and transmit subsequent data frames and primitives between the FCAL net coupled to the port which received the primitive and the FCAL net coupled to another port on the same integrated circuit having the destination node identified in said primitive or to make connections through said crossbar switch to forward said primitive to a port on another integrated circuit and an FCAL net coupled to said port and said destination node and to transfer any subsequent data frames and primitives between said FCAL nets coupled to different integrated circuits through said crossbar switch and the ports coupled to said FCAL nets.