Wireless communications device including power detector circuit coupled to sample signal at interior node of amplifier
First Claim
1. A wireless communications device, comprising:
- a processor;
an antenna;
a signal path between the processor and the antenna;
an amplifier comprising a plurality of amplifier stages in the signal path between the processor and the antenna, said amplifier including a plurality of interior nodes in the signal path between, and exclusive of, an input node of the amplifier that receives a first signal on the signal path and an output node of the amplifier from which the first signal goes to the antenna;
a power detector circuit comprising a plurality of inputs and an output, wherein each of the plurality of inputs is coupled to a separate one of the interior nodes, the power detector is operable to detect the first signal at each of the plurality of interior nodes, and the power detector is operable to output a second signal that reflects the first signal at the detected plurality of interior nodes, andwherein the processor is operable to adjust an amplitude of the first signal in response to the second signal.
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Accused Products
Abstract
A multi-stage amplifier is coupled with a power detector. The multi-stage amplifier includes a plurality of amplifier stages in series, with a signal path extending through them. The power detector is coupled to an interior node of the amplifier along the signal path, and is operable to sample a first signal being transmitted on the signal path. The power detector outputs a second signal reflective of a power of the first signal. In one embodiment, the interior node is in a matching network of the amplifier disposed between a first amplifier stage and a final amplifier stage of the amplifier. The second signal may be used in a feedback network to adjust an amount of amplification of the first signal by the amplifier.
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Citations
14 Claims
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1. A wireless communications device, comprising:
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a processor; an antenna; a signal path between the processor and the antenna; an amplifier comprising a plurality of amplifier stages in the signal path between the processor and the antenna, said amplifier including a plurality of interior nodes in the signal path between, and exclusive of, an input node of the amplifier that receives a first signal on the signal path and an output node of the amplifier from which the first signal goes to the antenna; a power detector circuit comprising a plurality of inputs and an output, wherein each of the plurality of inputs is coupled to a separate one of the interior nodes, the power detector is operable to detect the first signal at each of the plurality of interior nodes, and the power detector is operable to output a second signal that reflects the first signal at the detected plurality of interior nodes, and wherein the processor is operable to adjust an amplitude of the first signal in response to the second signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14)
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Specification