Apparatus, system, and method for down-converting and up-converting electromagnetic signals

• US 7,010,286 B2
• Filed: 05/16/2001
• Issued: 03/07/2006
• Est. Priority Date: 04/14/2000
• Status: Expired due to Fees

• Current Assignee: ParkerVision, Inc.
• Original Assignee: ParkerVision, Inc.
• Inventors: Cook, Robert W., Rawlins, Gregory S., Bultman, Michael J., Sorrells, David F., Moses, Charley D. Jr., Looke, Richard C., Rawlins, Michael W.
• Primary Examiner(s): LE, LANA N
• Application Number:
  US09/855,851
• Publication Number:
  US 20020042257A1
• Time in Patent Office: 1,756 Days
• Field of Search: 455313-334, 455/318, 455/330, 455/326, 327/356, 327357-360
• US Class Current: 455/313
• CPC Class Codes: H03D 7/00 Transference of modulation from one carrier to another, e.g. frequency-changing H03D9/00, H03D11/00 take precedence; dielectric amplifiers, magnetic amplifiers, parametric amplifiers used as a frequency-changers H03F
• CPC Class Codes: H04B 1/16 Circuits

Abstract

Methods, systems, and apparatuses for down-converting and up-converting an electromagnetic signal. In embodiments, the invention operates by receiving an electromagnetic signal and recursively operating on approximate half cycles of a carrier signal. The recursive operations can be performed at a sub-harmonic rate of the carrier signal. The invention accumulates the results of the recursive operations and uses the accumulated results to form a down-converted signal. In embodiments, up-conversion is accomplished by controlling a switch with an oscillating signal, the frequency of the oscillating signal being selected as a sub-harmonic of the desired output frequency. When the invention is being used in the frequency modulation or phase modulation implementations, the oscillating signal is modulated by an information signal before it causes the switch to gate a bias signal. The output of the switch is filtered, and the desired harmonic is output.

Claims

1. An apparatus for down-converting an electromagnetic signal, comprising:

a first and second capacitor each having a first and second port;

a switching device having a first, second, and third port; and

a first and second impedance device each having a first and second port, wherein the second port of the first capacitor is electrically coupled to the first port of the switching device and the first port of the first impedance device,

the second port of the second capacitor is electrically coupled to the second port of the switching device and the first port of the second impedance device, and

the second port of the first impedance device is electrically coupled to the second port of the second impedance device, and wherein

a switching signal is applied to the third port of the switching device.

2. The apparatus of claim 1, wherein

the first capacitor discharges between six percent to fifty percent of the total charge stored therein during a period of time that the switching device is open, and

the second capacitor discharges between six percent to fifty percent of the total charge stored therein during the period of time that the switching device is open.

3. The apparatus of claim 1, wherein

the first capacitor discharges between six percent to twenty-five percent of the total charge stored therein during a period of time that the switching device is open, and

the second capacitor discharges between six percent to twenty-five percent of the total charge stored therein during the period of time that the switching device is open.

4. The apparatus of claim 1, wherein

the first capacitor discharges between ten percent to twenty percent of the total charge stored therein during a period of time that the switching device is open, and

the second capacitor discharges between ten percent to twenty percent of the total charge stored therein during the period of time that the switching device is open.

5. The apparatus of claim 1, wherein

the first capacitor discharges between fifteen percent to twenty-five percent of the total charge stored therein during a period of time that the switching device is open, and

the second capacitor discharges between fifteen percent to twenty-five percent of the total charge stored therein during the period of time that the switching device is open.

6. The apparatus of claim 1, wherein the first impedance device is an input impedance of a first amplifier and the second impedance device is an input impedance of a second amplifier.

7. The apparatus of claim 1, wherein the switching device includes a transistor.

8. The apparatus of claim 1, wherein the switching device includes a FET.

9. The apparatus of claim 1, wherein the switching device includes a JFET.

10. The apparatus of claim 1, wherein the switching device includes a MOSFET.

11. The apparatus of claim 1, wherein the first port of the first impedance device is electrically coupled to an input port of a first operational amplifier and the first port of the second impedance device is electrically coupled to an input port of a second operational amplifier.