Internal bus system for DFPS and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity

• US 7,010,667 B2
• Filed: 04/05/2002
• Issued: 03/07/2006
• Est. Priority Date: 02/11/1997
• Status: Expired due to Term

• Current Assignee: Maren Krass, Thomas Richter
• Original Assignee: Pact XPP Technologies, AG
• Inventors: Vorbach, Martin, Münch, Robert
• Primary Examiner(s): VO, TIM T
• Application Number:
  US10/116,986
• Publication Number:
  US 20030135686A1
• Time in Patent Office: 1,432 Days
• Field of Search: 712/10, 703/23, 326/39
• US Class Current: 712/10
• CPC Class Codes: H03K 19/17704 the logic functions being realised by the interconnection of rows and columns
• CPC Class Codes: H03K 19/17736 Structural details of routing resources
• CPC Class Codes: H03K 19/17796 for physical disposition of blocks

Abstract

An internal bus system for DFPs and units with two- or multi-dimensional programmable cell architectures, for managing large volumes of data with a high interconnection complexity. The bus system can transmit data between a plurality of function blocks, where multiple data packets can be on the bus at the same time. The bus system automatically recognizes the correct connection for various types of data or data transmitters and sets it up.

Claims

1. An internal bus system for a unit, comprising:

a plurality of electrically independent bus segments provided within the unit; and

a plurality of nodes separating the bus segments and actively connecting and disconnecting at least two of the plurality of bus segments via at least one of i) a gate, ii) a switching element, iii) a driver, and iv) a register, each of the nodes including;

a respective routing table storing setup information for connections within the unit, and

a respective monitoring unit independently verifying whether a connection can be set up within the unit,

wherein at least some of the setup information for connections within the unit in an at least one node of the plurality of nodes depends on the state of an adjacent node.

2. The system of claim 1, wherein

the routing table includes a priority identifier.

3. The system of claim 1, wherein the nodes further include

a priority logic unit.

4. The system of claim 1, wherein

the plurality of nodes are configured to disconnect a connection using a bus segment if a higher priority connection requires the bus segment.

5. The system of claim 1, wherein

the plurality of nodes are configured to clear a bus segment if a complete connection can not be established using the bus segment.

6. A method for transmitting data within a module having a multi-dimensional cell architecture and an internal bus system, the method comprising:

choosing a first segment of a plurality of segments of the internal bus system;

choosing a second segment adjacent to the first segment, the choice of the second segment depending on state information about the second segment provided to a node in the multi-dimensional cell architecture;

connecting a plurality of segments of the internal bus system, the plurality of segments including the first segment and the second segment; and

transmitting the data between cells of the module with synchronization via the plurality of bus segments,

wherein the plurality of bus segments are connectable in a plurality of configurations.

7. The method of claim 6,

wherein the choice of the second segment depends on priority information for the desired connection.

8. The method of claim 6,

wherein the choice of the second segment depends on congestion information.

9. The method of claim 7, further comprising:

verifying whether a connection can be set up between the cells using the first plurality of bus segments.

10. The method of claim 9, wherein

the verifying is carried out locally along the bus lines.

11. The method of claim 9, further comprising:

clearing the first plurality of bus segments when the connection can not be set up between the cells using the first plurality of bus segments.

12. The method of claim of claim 11, further comprising:

retrying the attempt to connect the cells after the first plurality of bus segments have been cleared.