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Method of manufacturing an enhanced thermal dissipation integrated circuit package

  • US 7,015,072 B2
  • Filed: 03/18/2004
  • Issued: 03/21/2006
  • Est. Priority Date: 07/11/2001
  • Status: Expired due to Fees
First Claim
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1. A method of manufacturing an integrated circuit package, comprising:

  • installing a carrier onto an upper surface of a substrate, wherein said carrier defines a cavity;

    attaching a semiconductor die to said upper surface of said substrate within said cavity of said carrier;

    aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element;

    resting said assembly on said carrier such that said thermally conductive element does not directly contact said semiconductor die;

    encapsulating said cavity to form a prepackage such that a portion of said heat sink is exposed to the surroundings of said package; and

    singulating said prepackage to form said package, wherein a top portion and a side portion of said heat sink are exposed to the surroundings of said package.

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