Method of manufacturing an enhanced thermal dissipation integrated circuit package
First Claim
Patent Images
1. A method of manufacturing an integrated circuit package, comprising:
- installing a carrier onto an upper surface of a substrate, wherein said carrier defines a cavity;
attaching a semiconductor die to said upper surface of said substrate within said cavity of said carrier;
aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element;
resting said assembly on said carrier such that said thermally conductive element does not directly contact said semiconductor die;
encapsulating said cavity to form a prepackage such that a portion of said heat sink is exposed to the surroundings of said package; and
singulating said prepackage to form said package, wherein a top portion and a side portion of said heat sink are exposed to the surroundings of said package.
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Abstract
In one aspect, the present invention relates to a method of manufacturing an integrated circuit package, the method including installing a carrier onto a substrate, attaching a semiconductor die to the substrate, and aligning an assembly over the semiconductor die, wherein the assembly includes a heat sink and a thermally conductive element. This aspect further includes resting the assembly on the carrier such that the thermally conductive element does not directly contact the semiconductor die, and encapsulating the thermally conductive element and the heat sink such that a portion of the heat sink is exposed to the surroundings of the package.
164 Citations
18 Claims
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1. A method of manufacturing an integrated circuit package, comprising:
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installing a carrier onto an upper surface of a substrate, wherein said carrier defines a cavity; attaching a semiconductor die to said upper surface of said substrate within said cavity of said carrier; aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element; resting said assembly on said carrier such that said thermally conductive element does not directly contact said semiconductor die; encapsulating said cavity to form a prepackage such that a portion of said heat sink is exposed to the surroundings of said package; and singulating said prepackage to form said package, wherein a top portion and a side portion of said heat sink are exposed to the surroundings of said package. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method of manufacturing an integrated circuit package, comprising:
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installing a carrier onto a substrate; attaching a semiconductor die to said substrate; aligning an assembly over said semiconductor die, wherein said assembly comprises a heat sink and a thermally conductive element; resting said assembly on said carrier such that said thermally conductive element does not directly contact said semiconductor die; encapsulating said thermally conductive element and said heat sink such that a portion of said heat sink is exposed to the surroundings of said package; and singulating, wherein a top portion and a side portion of said heat sink are exposed to the surroundings of said package. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18)
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Specification