Method of fabricating one-time programmable read only memory
First Claim
1. A method of fabricating a one-time programmable read only memory, comprising:
- providing a substrate comprising a memory cell area and a peripheral circuit area, wherein the memory cell area includes at least a one-time programmable read only memory cell, while the peripheral circuit area includes at least a logic device;
forming a silicon oxide layer over the substrate to cover the one-time programmable read only memory cell, the logic device and the exposed surface of the substrate;
forming a silicon nitride layer on the silicon oxide layer;
removing the silicon nitride layer and the silicon oxide layer in the peripheral circuit area, wherein the retained silicon nitride layer and silicon oxide layer in the memory cell area are as a salicide blocking layer (SAB); and
performing a salicide process.
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Accused Products
Abstract
A method of fabricating a one-time programmable read only memory of the present invention is provided. First, a substrate having a memory cell area and a peripheral circuit area is provided. The memory cell area includes at least a one-time programmable read only memory cell, while the peripheral circuit area includes at least a logic device. Thereafter, a silicon oxide layer is formed over the substrate to cover the one-time programmable read only memory cell, the logic device and the exposed surface of the substrate. Next, a silicon nitride layer is formed on the silicon oxide layer. Then, the silicon nitride layer and the silicon oxide layer in the peripheral circuit area are removed, and the retained silicon nitride layer and silicon oxide layer in the memory cell area are as a salicide blocking layer (SAB). Thereafter, a salicide process is performed.
32 Citations
7 Claims
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1. A method of fabricating a one-time programmable read only memory, comprising:
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providing a substrate comprising a memory cell area and a peripheral circuit area, wherein the memory cell area includes at least a one-time programmable read only memory cell, while the peripheral circuit area includes at least a logic device; forming a silicon oxide layer over the substrate to cover the one-time programmable read only memory cell, the logic device and the exposed surface of the substrate; forming a silicon nitride layer on the silicon oxide layer; removing the silicon nitride layer and the silicon oxide layer in the peripheral circuit area, wherein the retained silicon nitride layer and silicon oxide layer in the memory cell area are as a salicide blocking layer (SAB); and performing a salicide process. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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Specification