Amplification-type solid state imaging device with reduced shading

• US 7,016,089 B2
• Filed: 12/04/2000
• Issued: 03/21/2006
• Est. Priority Date: 12/06/1999
• Status: Expired due to Fees

• Current Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Original Assignee: Canon Kabushiki Kaisha (Canon Inc.)
• Inventors: Kochi, Tetsunobu, Sugawa, Shigetoshi, Koizumi, Toru, Yoneda, Tomoya
• Primary Examiner(s): Coles, Edward
• Assistant Examiner(s): Gibbs, Heather D.
• Application Number:
  US09/727,486
• Publication Number:
  US 20010012133A1
• Time in Patent Office: 1,933 Days
• Field of Search: 358/482, 358/496, 358471-474, 358/513, 250/214.1, 250/208.1, 257292-294, 349105-106, 348308-310
• US Class Current: 358/482
• CPC Class Codes: H01L 27/14603 Special geometry or disposition of pixel-elements, address-lines or gate-electrodes
• CPC Class Codes: H01L 27/14609 Pixel-elements with integrated switching, control, storage or amplification elements scanning details of imagers (circuitry of solid-state image sensors H04N25/00); circuitry of imagers H04N25/70
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/14643 Photodiode arrays; MOS imagers
• CPC Class Codes: H04N 1/195 the array comprising a two-dimensional array or a combination of two-dimensional arrays

Abstract

To control the potential distribution generated in a well at the time of amplification and reduce a shading in a solid-state imaging device of amplification type, the amplification type solid-state imaging device of the present invention comprises a plurality of picture elements each including photoelectric conversion elements formed in a second conductivity type common well inside a first conductivity type substrate, wherein a plurality of well contacts are disposed inside a picture element array area.

Claims

1. A solid-state imaging device of the amplification type, comprising,

a plurality of picture elements arranged two-dimensionally, each picture element comprising:

a semiconductor light-receiving region of a first conductivity type serving as a photoelectric conversion element, the photoelectric conversion element being disposed in a common well of a second conductivity type formed in a semiconductor substrate of the first conductivity type;

a semiconductor region of the first conductivity type serving as a source or drain of a transistor for amplification, the semiconductor region being disposed in the common well;

contacts for supplying a reference voltage to the common well, the reference voltage contacts being disposed outside the outermost picture elements and in each picture element;

a wiring connected to the reference voltage contacts for supplying a reference voltage; and

a power source contact for supplying, to the semiconductor region of the first conductivity type, a power source voltage for driving the transistor for amplification, the power source contact being disposed in each picture element,

wherein the power source contact is connected by a wiring to a power source, the power source wiring being separate from the reference voltage wiring,

wherein one of either the reference voltage contacts or the power source contacts is connected to a wiring arranged at every row or every column of the picture elements and the other of the reference voltage contacts or the power source contacts is connected to a shielding layer having a light-receiving window formed above the wiring arranged at every row or every column of the picture elements, and

wherein the wiring arranged at every row or every column of the picture elements is connected to the reference voltage contacts and is disposed between two control lines for controlling a semiconductor element inside the picture element.

2. A solid-state imaging device of the amplification type, comprising,

a plurality of picture elements arranged two-dimensionally, each picture element comprising:

a semiconductor light-receiving region of a first conductivity type serving as a photoelectric conversion element, the photoelectric conversion element being disposed in a common well of a second conductivity type formed in a semiconductor substrate of the first conductivity type, and

a semiconductor region of the first conductivity type serving as a source or drain of a transistor for amplification, the semiconductor region being disposed in the common well;

contacts for supplying a reference voltage to the common well, the reference voltage contacts being disposed outside the outermost picture elements and in each picture element;

a wiring connected to the reference voltage contacts for supplying a reference voltage; and

a power source contact for supplying, to the semiconductor region of the first conductivity type, a power source voltage for driving the transistor for amplification, the power source contact being disposed in each picture element,

wherein the power source contact is connected by a wiring to a power source, the power source wiring being separate from the reference voltage wiring,

wherein the power source contacts are connected to a shielding layer having a light-receiving window formed above the wiring for the reference voltage, and

wherein the reference voltage wiring is disposed between two control lines for controlling a semiconductor element in the picture element.

3. A solid-state imaging device of the amplification type, comprising,

a plurality of picture elements arranged two-dimensionally, each picture element comprising:

a semiconductor light-receiving region of a first conductivity type serving as a photoelectric conversion element, the photoelectric conversion element being disposed in a common well of a second conductivity type formed in a semiconductor substrate of the first conductivity type;

a semiconductor region of the first conductivity type serving as a source or drain of a transistor for amplification, the semiconductor region being disposed in the common well;

contacts for supplying a reference voltage to the common well, the reference voltage contacts being disposed outside the outermost picture elements and in each picture element;

a wiring connected to the reference voltage contacts for supplying a reference voltage; and

a power source contact for supplying, to the semiconductor region of the first conductivity type, a power source voltage for driving the transistor for amplification, the power source contact being disposed in each picture element,

wherein the power source contact is connected by a wiring to a power source, the power source wiring being separate from the reference voltage wiring

wherein one of either the reference voltage contacts or the power source contacts is connected to a wiring arranged at every row or every column of the picture elements and the other of the reference voltage contacts or the power source contacts is connected to a shielding layer having a light-receiving window formed above the wiring arranged at every row or every column of the picture elements,

wherein the wiring arranged at every row or every column of the picture elements is connected to the reference voltage contacts and is disposed between two control lines for controlling a semiconductor element inside the picture element,

wherein each of the picture elements further includes a transfer gate, a transistor for reset and a transistor for selection, and

wherein the two control lines are two selected from the group consisting of a control line of the transfer gate, a control line of the reset transistor and a control line of the selection transistor.

4. solid-state imaging device of the amplification type, comprising,

a plurality of picture elements arranged two-dimensionally, each picture element comprising:

a semiconductor light-receiving region of a first conductivity type serving as a photoelectric conversion element, the photoelectric conversion element being disposed in a common well of a second conductivity type formed in a semiconductor substrate of the first conductivity type;

a semiconductor region of the first conductivity type serving as a source or drain of a transistor for amplification, the semiconductor region being disposed in the common well;

contacts for supplying a reference voltage to the common well, the reference voltage contacts being disposed outside the outermost picture elements and in each picture element;

a wiring connected to the reference voltage contacts for supplying a reference voltage; and

a power source contact for supplying, to the semiconductor region of the first conductivity type, a power source voltage for driving the transistor for amplification, the power source contact being disposed in each picture element,

wherein the power source contact is connected by a wiring to a power source, the power source wiring being separate from the reference voltage wiring,

wherein each of the picture elements further includes a reset transistor,

wherein a reset contact for supplying a reference voltage for reset to the reset transistor is disposed in each picture element,

wherein any two of the power supply contact, the reset contact and the power source contact are connected to intersecting wirings arranged in the picture element array area, and

wherein the remaining one of the power supply contact, the reset contact and the power source contact is connected to a shielding film having a light-receiving window formed above the wiring intersecting wiring.