Semiconductor device analyzer, method for analyzing/manufacturing semiconductor device, and storage medium storing program for analyzing semiconductor device
First Claim
1. A semiconductor device analyzer comprising:
- a substrate model reading module configured to read, from input data to the semiconductor device analyzer, a substrate network model of three-dimensional meshes representing a substrate of a semiconductor device at a surface of and in which circuit elements are merged;
a Y-matrix entry module configured to prepare a Y-matrix from the substrate network model and express each element of the Y-matrix with a polynomial of differential operator “
s”
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a discriminating module configured to discriminate internal nodes to be eliminated from and external nodes to be left in the substrate network model; and
a matrix reduction module configured to reduce the Y-matrix by eliminating the internal nodes by repeatedly calculating relationships between four elements of the Y-matrix, associated with internal nodes to be eliminated, without calculating an inverse matrix of the Y-matrix.
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Accused Products
Abstract
A semiconductor device analyzer has a substrate model reading module, a Y-matrix entry module, a discriminating module, a matrix reduction module, and an output format discriminating module. The substrate model reading module reads a substrate network model of three-dimensional meshes representing the substrate of a semiconductor device. The substrate network model is a network of resistive and capacitive elements and is used for the simulation and analysis of the semiconductor substrate. The Y-matrix entry module prepares a Y-matrix from the substrate network model, each element of the Y-matrix being expressed with a polynomial of differential operator “s”. The discriminating module discriminates internal nodes to be eliminated from external nodes to be left among the nodes of the substrate network model. The matrix reduction module eliminates the internal nodes, thereby reducing the Y-matrix. The output format determining module determines an output format for an operation result.
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Citations
24 Claims
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1. A semiconductor device analyzer comprising:
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a substrate model reading module configured to read, from input data to the semiconductor device analyzer, a substrate network model of three-dimensional meshes representing a substrate of a semiconductor device at a surface of and in which circuit elements are merged; a Y-matrix entry module configured to prepare a Y-matrix from the substrate network model and express each element of the Y-matrix with a polynomial of differential operator “
s”
;a discriminating module configured to discriminate internal nodes to be eliminated from and external nodes to be left in the substrate network model; and a matrix reduction module configured to reduce the Y-matrix by eliminating the internal nodes by repeatedly calculating relationships between four elements of the Y-matrix, associated with internal nodes to be eliminated, without calculating an inverse matrix of the Y-matrix. - View Dependent Claims (2, 3, 4, 6, 7)
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5. A method for analyzing a semiconductor device, comprising:
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discriminating, among data prescribed in an input format for a circuit simulator, data expressing a substrate network model three-dimensional meshes representing a substrate of the semiconductor device at a surface of and in which circuit elements are merged; reading the data expressing the substrate network model; preparing a Y-matrix from the data expressing the substrate network model; expressing the element of the Y-matrix with a polynomial of differential operator “
s”
;discriminating elements of the Y-matrix corresponding to internal nodes to be eliminated from and external nodes to be left in the substrate network model; and reducing the Y-matrix by eliminating the internal nodes by repeatedly calculating relationships between four elements of the Y-matrix, associated with internal nodes to be eliminated, without calculating an inverse matrix of the Y-matrix. - View Dependent Claims (8, 9, 10, 11, 12, 13)
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14. A method for manufacturing a semiconductor device, comprising:
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discriminating, among data prescribed in an input format for a circuit simulator, data expressing a substrate network model of three-dimensional meshes representing a substrate of the semiconductor device at a surface of and in which circuit elements are merged; reading the data expressing the substrate network model; preparing a Y-matrix from the data expressing the substrate network model; expressing each element of the Y-matrix with a polynomial of differential operator “
s”
;discriminating elements of the Y-matrix corresponding to internal nodes to be eliminated from and external nodes to be left in the substrate network model; reducing the Y-matrix by eliminating the internal nodes by repeatedly calculating relationships between four elements of the Y-matrix, associated with internal nodes to be eliminated, without calculating an inverse matrix of the Y-matrix; reconstituting data in the input format for the circuit simulator from the reduced Y-matrix; and carrying out a circuit simulation with the reconstituted data for the circuit simulator, to analyze the influence of parasitic elements in the substrate on wiring capacitance of the semiconductor device. - View Dependent Claims (15, 16, 17, 18, 19, 20)
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21. A computer program product for controlling a semiconductor device analyzer, the program product comprising:
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a storage medium readable by the semiconductor device analyzer; and a program recorded on the storage medium configured to be executed on the semiconductor device analyzer, the program comprising; discriminating, among data prescribed in an input format for a circuit simulator, data expressing a substrate network model of three-dimensional meshes representing a substrate of the semiconductor device at a surface of and in which circuit elements are merged; reading the data expressing the substrate network model; preparing a Y-matrix from the data expressing the substrate network model; expressing each element of the Y-matrix with a polynomial of differential operator “
s”
;discriminating elements of the Y-matrix corresponding to internal nodes to be eliminated from and external nodes to be left in the substrate network model; and reducing the Y-matrix by eliminating the internal nodes by repeatedly calculating relationships between four elements of the Y-matrix, associated with internal nodes to be eliminated, without calculating an inverse matrix of the Y-matrix. - View Dependent Claims (22, 23, 24)
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Specification