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Round-robin updating for high speed I/O parallel interfaces

  • US 7,017,086 B2
  • Filed: 06/18/2002
  • Issued: 03/21/2006
  • Est. Priority Date: 06/18/2002
  • Status: Active Grant
First Claim
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1. A communication system, comprising:

  • a plurality of links wherein each link comprises a data line arranged to transmit a data signal and a clock line arranged to transmit a clock signal;

    a first latch device arranged to latch a signal on the data line of at least one of the plurality of links; and

    a first test circuit operatively connected to the plurality of links, wherein the first test circuit tests at least the one of the plurality of links, the first test circuit comprising;

    a first adjustment circuit arranged to generate a first adjustable clock signal from the clock signal of the one of the plurality of links being tested, wherein the first adjustment circuit adjusts a timing of the first adjustable clock signal relative to the data signal of the one of the plurality of links being tested, wherein the first latch device is responsive to the first adjustable clock signal, anda first pattern comparator arranged to compare a first latched test pattern signal to a first test pattern signal, wherein the first latched test pattern signal comprises the first test pattern signal latched from the data line of the one of the plurality of links by the first latch device,wherein the first test circuit is arranged to perform a round-robin testing of the plurality of the links while the communication system is in operation without affecting a designated transmission bandwidth of the communication system,wherein the first test circuit is arranged to output a control signal upon completion of testing the at least one of the plurality of links, andwherein, when the first test circuit tests the at least one of the plurality of links, a transmission bandwidth of the communication system is not affected.

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