Low density parity check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses

• US 7,017,106 B2
• Filed: 07/29/2004
• Issued: 03/21/2006
• Est. Priority Date: 08/15/2002
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Shen, Ba-Zhong, Tran, Hau Thien, Cameron, Kelly Brian
• Primary Examiner(s): CHASE, SHELLY A
• Application Number:
  US10/901,528
• Publication Number:
  US 20050010856A1
• Time in Patent Office: 600 Days
• Field of Search: 714/752, 714/755, 714/758, 714/792, 714/794, 375/242, 375/341
• US Class Current: 714/801
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/0057 Block codes H04L1/0061, H04L1/0064 take precedence

Abstract

Low Density Parity Check (LDPC) code decoder using min*, min**, max* or max** and their respective inverses. For the first time, min* processing is demonstrated for use in decoding LDPC-coded signals. In addition, max*, min**, or max** (and their respective inverses) may also be employed when performing calculations that are required to perform decoding of signals coded using LDPC code. These new parameters may be employed to provide for much improved decoding processing for LDPC codes when that decoding involves the determination of a minimal and/or maximal value, or a minimal and/or maximal log corrected value, from among a number of possible values. The total number of processing steps employed within the decoding of an LDPC-coded signal is significantly reduced be employing the min*, max*, min**, or max** (and their respective inverses) decoding processing described herein.

Claims

1. A decoder that performs min* check node processing when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

a check node processing functional block that is operable to update an extrinsic information value of a check node by employing min* processing;

a min* functional block, whose operation is directed by the check node processing functional block, that is operable to perform the min* processing on a first value and a second value;

wherein the min* functional block is operable to determine a first sign function value using the first value;

wherein the min* functional block is operable to determine a second sign function value using the second value;

wherein the min* functional block retrieves from a memory a predetermined logarithmic correction factor that is selected based upon at least one of the first value and the second value; and

wherein the min* functional block updates the extrinsic information value of the check node using the first sign function value, the second sign function value, and the predetermined logarithmic correction factor that is retrieved from the memory.

2. The decoder of claim 1, wherein:

the min* functional block determines a minimum value from among the first value and the second value; and

the min* functional block updates the extrinsic information value of the check node using the first sign function value, the second sign function value, the minimum value, and the predetermined logarithmic correction factor that is retrieved from the memory.

3. The decoder of claim 1, wherein:

the min* functional block determines a minimum value from among an absolute value of the first value and an absolute value of the second value; and

the min* functional block updates the extrinsic information value of the check node using the first sign function value, the second sign function value, the minimum value, and the predetermined logarithmic correction factor that is retrieved from the memory.

4. The decoder of claim 1, wherein:

the memory from which the predetermined logarithmic correction factor is retrieved is ROM (Read Only Memory).

5. The decoder of claim 1, wherein:

the min* functional block multiplies the first sign function value, by the second sign function value, and by the predetermined logarithmic correction factor that is retrieved from the memory.

6. The decoder of claim 1, wherein:

the check node is one check node within a plurality of check nodes within an LDPC code bipartite graph;

the LDPC code bipartite graph include a plurality of variable nodes; and

variable nodes within the plurality of variable nodes are selectively connected via edges to check nodes within the plurality of check nodes.

7. The decoder of claim 1, wherein:

the check node processing functional block and a variable node processing functional block cooperatively perform iterative decoding processing thereby generating a best estimate of at least one bit within the LDPC coded signal.

8. The decoder of claim 1, wherein:

the decoder is contained within at least one of a satellite receiver, a High Definition Television (HDTV) set top box receiver, a base station receiver, a mobile receiver, a receiver, a mobile unit, a transceiver, an advanced modulation satellite receiver, and a Dense Wavelength Division Multiplexing (DWDM) line card.

9. The decoder of claim 1, wherein:

the decoder is implemented within a communication receiver; and

the communication receiver is contained within at least one of a satellite communication system, a High Definition Television (HDTV) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, and a fiber-optic communication system.

10. A decoder that performs min** check node processing when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

a check node processing functional block that is operable to update an extrinsic information value of a check node corresponding to an edge by employing min** processing;

wherein the edge and at least one additional edge connect between the check node and at least two variable nodes within an LDPC code bipartite graph;

a min** functional block, whose operation is directed by the check node processing functional block, that is operable to perform the min** processing;

wherein the min** functional block is operable to calculate a min** resultant (A) using at least one extrinsic information value of at least one variable node corresponding to the at least one additional edge;

wherein the min** functional block is operable to calculate a product of terms function (S) of a at least one sign function value that corresponds to the at least one extrinsic information value of at least one variable node corresponding to the at least one additional edge;

wherein the min** functional block is operable to perform min**−

processing on A and an extrinsic information value of a variable node corresponding to the edge; and

wherein the min** functional block is operable to multiply S by a sign function value of the extrinsic information value of the variable node corresponding to the edge.

11. The decoder of claim 10, wherein:

the min** functional block is operable to calculate a min** resultant (A) using at least one absolute value of at least one extrinsic information value of at least one variable node corresponding to the at least one additional edge.

12. The decoder of claim 10, wherein:

the min** functional block is operable to perform min**−

processing on A and an absolute value of the extrinsic information value of the variable node corresponding to the edge.

13. The decoder of claim 10, wherein:

the min** functional block is operable to perform min**−

processing on A and the extrinsic information value of the variable node corresponding to the edge thereby generating a first resultant;

the min** functional block is operable to multiply S by the sign function value of the extrinsic information value of the variable node corresponding to the edge thereby generating a second resultant; and

the updated extrinsic information value of the check node corresponding to the edge is a product of the first resultant and the second resultant.

14. The decoder of claim 10, wherein:

the check node processing functional block and a variable node processing functional block cooperatively perform iterative decoding processing thereby generating a best estimate of at least one bit within the LDPC coded signal.

15. The decoder of claim 10, wherein:

the decoder is contained within at least one of a satellite receiver, a High Definition Television (HDTV) set top box receiver, a base station receiver, a mobile receiver, a receiver, a mobile unit, a transceiver, an advanced modulation satellite receiver, and a Dense Wavelength Division Multiplexing (DWDM) line card.

16. The decoder of claim 15, wherein:

the min** functional block is operable to perform min**−

processing on A and the extrinsic information value of the variable node corresponding to the edge thereby generating a first resultant;

the min** functional block is operable to multiply S by the sign function value of the extrinsic information value of the variable node corresponding to the edge thereby generating a second resultant; and

the updated extrinsic information, value of the check node corresponding to the edge is a product of the first resultant and the second resultant.

17. The decoder of claim 15, wherein:

the decoder is contained within at least one of a satellite receiver, a High Definition Television (HDTV) set top box receiver, a base station receiver, a mobile receiver, a receiver, a mobile unit, a transceiver, an advanced modulation satellite receiver, and a Dense Wavelength Division Multiplexing (DWDM) line card.

18. The decoder of claim 15, wherein:

the decoder is implemented within a communication receiver; and

the communication receiver is contained within at least one of a satellite communication system, a High Definition Television (HDTV) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, and a fiber-optic communication system.

19. The decoder of claim 10, wherein:

the decoder is implemented within a communication receiver; and

the communication receiver is contained within at least one of a satellite communication system, a High Definition Television (HDTV) communication system, a cellular communication system, a microwave communication system, a point-to-point communication system, a uni-directional communication system, a bi-directional communication system, a one to many communication system, and a fiber-optic communication system.

20. A decoder that performs min** check node processing when decoding an LDPC (Low Density Parity Check) coded signal, the decoder comprising:

a check node processing functional block that is operable to update an extrinsic information value of a check node corresponding to an edge by employing min** processing;

wherein the edge and at least one additional edge connect between the check node and at least two variable nodes within an LDPC code bipartite graph;

a min** functional block, whose operation is directed by the check node processing functional block, that is operable to perform the min** processing;

wherein the min** functional block is operable to calculate a min** resultant (A) using at least one absolute value of at least one extrinsic information value of at least one variable node corresponding to the at least one additional edge;

wherein the min** functional block is operable to calculate a product of terms function (S) of a at least one sign function value that corresponds to the at least one extrinsic information value of at least one variable node corresponding to the at least one additional edge;

wherein the min** functional block is operable to perform min**−

processing on A and an absolute value of the extrinsic information value of the variable node corresponding to the edge; and

wherein the min** functional block is operable to multiply S by a sign function value of the extrinsic information value of the variable node corresponding to the edge.