Individual configuration

• US 7,017,821 B2
• Filed: 09/24/2002
• Issued: 03/28/2006
• Est. Priority Date: 03/24/2000
• Status: Expired due to Term

• Current Assignee: Infineon Technologies AG
• Original Assignee: Infineon Technologies AG
• Inventors: Kux, Andreas, Palm, Herbert
• Primary Examiner(s): PERT, EVAN T
• Application Number:
  US10/253,176
• Publication Number:
  US 20030065473A1
• Time in Patent Office: 1,281 Days
• Field of Search: 438/14, 438/17, 438/18, 235/487, 235/488, 235/492, 235/494, 257/48
• US Class Current: 235/487
• CPC Class Codes: B42D 25/00 Information-bearing cards or sheet-like structures characterised by identification or security features; Manufacture thereof printing processes to produce identification or security features B41M3/14
• CPC Class Codes: B42D 25/405 Marking
• CPC Class Codes: G06K 19/067 Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
• CPC Class Codes: G06K 19/07309 Means for preventing undesired reading or writing from or onto record carriers
• CPC Class Codes: G07F 7/086 by passive credit-cards adapted therefor, e.g. constructive particularities to avoid counterfeiting, e.g. by inclusion of a physical or chemical security-layer for security documents G07D7/00; for the reading of record-carriers in general G06K7/00; for the design of coded credit-cards G06K19/10

Abstract

An individual configuration contains at least a first structure and a second structure, which are aligned with respect to each other. A position sensing device that senses a relative position of the first structure with respect to the second structure, in order to establish that a manipulation has been performed on the configuration, is provided.

Claims

1. An individual configuration, comprising:

a construction having a first structure and a second structure aligned with respect to said first structure, said first structure being disposed in a first device and said second structure being disposed in a second device;

a position sensing device for sensing a relative position between said first structure and said second structure; and

a position storing device connected to said position sensing device, said position storing device storing information on the relative position between said first structure and said second structure when the individual configuration is put into operation for the first time;

said position sensing device and said position storing device being disposed within the individual configuration.

2. The individual configuration according to claim 1, wherein said position sensing device has a comparison device for comparing the information stored in said position storing device with a sensed relative position.

3. The individual configuration according to claim 1, wherein said first structure and said second structure are respectively formed by electrically conducting contacts touching in a partially overlapping manner.

4. The individual configuration according to claim 3, wherein said electrically conducting contacts forming said first structure have a smaller surface area than said electrically conducting contacts forming said second structure.

5. The individual configuration according to claim 4, wherein the information on the relative position is determined by a number of said electrically conducting contacts of said first structure touching an electrically conducting contact forming said second structure.

6. The individual configuration according to claim 3, wherein:

said electrically conducting contacts of said first structure, lie in a row, and are spaced apart from one another by a first distance; and

said electrically conducting contacts of said second structure, lie in a row, and are spaced apart from one another by a second distance and the first distance and the second distance are different.

7. The individual configuration according to claim 1, further comprising a MOS transistor having a buried channel and a gate, said first structure forming said buried channel of said MOS transistor, and said second structure forming said gate of said MOS transistor.

8. The individual configuration according to claim 7, wherein the information on the relative position is a deviation from a predetermined position.