Synchronization of multiphase synthetic ripple voltage regulator
First Claim
1. A multiphase synthetic ripple voltage generator for a multiphase DC-DC regulator which includes a plurality of switching circuits each responsive to a corresponding one of a plurality of pulse width modulation (PWM) signals to switch at least one input voltage via a corresponding one of a plurality of phase nodes through a corresponding one of a plurality of output inductors to develop an output voltage at an output node, said multiphase synthetic ripple voltage generator comprising:
- a master clock circuit that generates a master clock signal;
sequence logic that sets each of the plurality of PWM signals in sequential order based on said master clock signal; and
a plurality of ripple generators, each comprising;
a transconductance amplifier having an input for coupling to a corresponding one of the output inductors and an output;
a ripple capacitor coupled to said output of said transconductance amplifier; and
a comparator, having a first input coupled to said ripple capacitor, a second input coupled to receive an error voltage, and an output coupled to said sequence logic for resetting a corresponding one of the plurality of PWM signals.
3 Assignments
0 Petitions
Accused Products
Abstract
A multiphase synthetic ripple voltage generator for a multiphase DC-DC regulator including a master clock circuit that generates a master clock signal, sequence logic and a ripple regulator for each phase. The DC-DC regulator includes multiple switching circuits, each responsive to a corresponding PWM signal to switch input voltages via a phase node through an output inductor to develop an output voltage. The sequence logic sets each PWM signal in sequential order based on the master clock signal. Each ripple generator includes a transconductance amplifier, a ripple capacitor and a comparator. The transconductance amplifier has an input coupled to a corresponding output inductor and an output coupled to a corresponding ripple capacitor. The comparator has a first input coupled to the ripple capacitor, a second input receiving an error voltage, and an output coupled to the sequence logic for resetting a corresponding PWM signal.
-
Citations
26 Claims
-
1. A multiphase synthetic ripple voltage generator for a multiphase DC-DC regulator which includes a plurality of switching circuits each responsive to a corresponding one of a plurality of pulse width modulation (PWM) signals to switch at least one input voltage via a corresponding one of a plurality of phase nodes through a corresponding one of a plurality of output inductors to develop an output voltage at an output node, said multiphase synthetic ripple voltage generator comprising:
-
a master clock circuit that generates a master clock signal; sequence logic that sets each of the plurality of PWM signals in sequential order based on said master clock signal; and a plurality of ripple generators, each comprising; a transconductance amplifier having an input for coupling to a corresponding one of the output inductors and an output; a ripple capacitor coupled to said output of said transconductance amplifier; and a comparator, having a first input coupled to said ripple capacitor, a second input coupled to receive an error voltage, and an output coupled to said sequence logic for resetting a corresponding one of the plurality of PWM signals. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
-
-
14. A multiphase synthetic ripple regulator, comprising:
-
a plurality of switching circuits, each alternately coupling a corresponding one of a plurality of phase nodes to opposite polarities of a corresponding one of a plurality of input voltages based on a corresponding one of a plurality of pulse width modulation (PWM) signals; a plurality of output inductors, each coupled between a corresponding one of said plurality of phase nodes and an output node that develops a regulated output voltage; an error amplifier that generates an error voltage based on said regulated output voltage compared to a reference voltage; a hysteretic comparator clock circuit, responsive to said output voltage and said error signal, that generates a master clock signal; sequence logic that initiates each of said plurality of PWM signals in sequential order based on said master clock signal; and a plurality of ripple generators, each comprising; a transconductance amplifier having an input for coupling to a corresponding one of said plurality of phase nodes and an output; a ripple capacitor coupled to said output of said transconductance amplifier; and a comparator, having a first input coupled to said ripple capacitor, a second input receiving said error voltage, and an output coupled to said sequence logic for terminating a corresponding one of said plurality of PWM signals. - View Dependent Claims (15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26)
-
Specification