Integrated network switching hub and bus structure

• US 7,020,735 B2
• Filed: 11/12/2003
• Issued: 03/28/2006
• Est. Priority Date: 05/21/1996
• Status: Expired due to Fees

• Current Assignee: PDACO LIMITED
• Original Assignee: Elonex IP Holdings Limited
• Inventors: Kikinis, Dan
• Primary Examiner(s): AUVE, GLENN ALLEN
• Application Number:
  US10/706,678
• Publication Number:
  US 20040105397A1
• Time in Patent Office: 867 Days
• Field of Search: 710/100, 710/107, 710/305, 710/316, 710/317, 370/402, 370/412, 370/413, 370/414, 709/250
• US Class Current: 710/316
• CPC Class Codes: H04L 49/254 Centralised controller, i.e. arbitration or scheduling
• CPC Class Codes: H04L 49/3027 Output queuing
• CPC Class Codes: H04L 49/351 for local area network [LAN], e.g. Ethernet switches

Abstract

A network switching hub is implemented on an IC chip, and has a bus connected to external ports through sets of queue switch transistors, source to drain for data switched onto the bus, the queue switch transistors gated simultaneously by control lines from an on-board arbitrator controller following a preprogrammed arbitration scheme. Data is switched off the bus and hub by port adapter controllers connected to read amplifier receivers connected directly to the on-chip bus, the port adapter controllers enabled by the arbitrator controller following the same preprogrammed arbitration scheme. Ports may be serial or parallel, and may be adapted to special purposes, such as PCI and hub to hub connection for expansion.

Claims

1. A method for redirecting data in a network comprising:

receiving data at a port;

switching the data onto a bus using a first switching means, wherein the first switching means are controlled by an arbitrator; and

making a determination at the arbitrator that data from the first switching means has been placed on the bus; and

making a selection at the arbitrator of a read amplifier appropriate to data placed on the bus by the first switching means for retrieving the data in accordance with a predetermined selection scheme under control of the arbitrator.

2. The method for redirecting data in a network of claim 1, wherein receiving data at the port comprises:

receiving data at a first media adapter controller; and

storing the data in a first buffer connected the bus through the first switching means; and

wherein switching the data onto the bus using the first switching means comprises;

receiving at the arbitrator a notification signal from the first media terminal adapter that data has arrived; and

in response to the notification signal, issuing a buffering instruction from the arbitrator to the first switching means to move the data from the first buffer on to the bus.

3. The method for redirecting data in a network of claim 1, wherein the first switching means comprises queue switch transistors.

4. The method for redirecting data in a network of claim 1 further comprising:

issuing a first read instruction from the arbitrator to a second switching means;

in response to the first read instruction, switching the data from the bus to a second buffer using the second switching means; and

transmitting the data from the second buffer to a data register for reading by the read amplifier.

5. The method for redirecting data in a networkof claim 4 further comprising:

issuing a second read instruction from the arbitrator to a second media adapter controller to read the data from the read amplifier; and

in response to the second read instruction, switching the data from the read amplifier to the second media adapter controller.

6. The method for redirecting data in a networkof claim 1, wherein the predetermined selection scheme is user configurable.

7. The method for redirecting data in a networkof claim 1, wherein the data is received in the form of packets.