Method and device for protecting micro electromechanical systems structures during dicing of a wafer

• US 7,022,546 B2
• Filed: 12/05/2001
• Issued: 04/04/2006
• Est. Priority Date: 12/05/2000
• Status: Expired due to Term

• Current Assignee: Analog Devices, Inc.
• Original Assignee: Analog Devices, Inc.
• Inventors: Spooner, Timothy R., Courage, David S., Workman, Brad
• Primary Examiner(s): Nguyen, Tuan H.
• Application Number:
  US10/007,585
• Publication Number:
  US 20020076848A1
• Time in Patent Office: 1,581 Days
• Field of Search: 438/110, 438/113, 438/118, 438/460, 438/464, 438/458, 438/51, 438/48, 438/112
• US Class Current: 438/106
• CPC Class Codes: B81C 1/00888 Multistep processes involving only mechanical separation, e.g. grooving followed by cleaving
• CPC Class Codes: B81C 1/00896 Temporary protection during separation into individual elements
• CPC Class Codes: H01L 21/6836 Wafer tapes, e.g. grinding or dicing support tapes adhesive tapes in general C09J7/20
• CPC Class Codes: H01L 2221/68327 used during dicing or grinding

Abstract

A wafer cap protects micro electromechanical system (“MEMS”) structures during a dicing of a MEMS wafer to produce individual MEMS dies. A MEMS wafer is prepared having a plurality of MEMS structure sites thereon. Upon the MEMS wafer, the wafer cap is mounted to produce a laminated MEMS wafer. The wafer cap is recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer. The capped MEMS wafer can be diced into a plurality of MEMS dies without causing damage to or contaminating the MEMS die.

Claims

1. A method for protecting a MEMS wafer during a dicing, comprising:

(a) mounting, upon a backside of the MEMS wafer, a layer of dicing tape, the MEMS wafer having a plurality of MEMS structure sites on a front side and a plurality of through holes, each through hole corresponding to a MEMS structure site, the through holes being formed such that each through hole penetrates through the wafer from the backside of the wafer to the front side;

(b) mounting, upon the front side of the MEMS wafer, prior to dicing, a wafer cap to produce a laminated MEMS wafer, the wafer cap having a first side and a second side, the first side being opposite of the second side, the first side of the wafer cap being recessed in areas corresponding to locations of the MEMS structure sites on the MEMS wafer, the second side of the wafer being substantially planar;

(c) dicing the MEMS wafer into a plurality of dies such that each die includes a MEMS structure site and a corresponding through hole; and

(d) mounting, upon the dicing tape, a layer of transfer tape.

2. The method as claimed in claim 1, wherein the wafer cap comprises a wafer cover tape and a perforated tape.

3. The method as claimed in claim 2, wherein the wafer cover tape comprises a static dissipative material.

4. The method as claimed in claim 1, wherein the wafer cover tape includes an adhesive medium.

5. The method as claimed in claim 4, wherein the adhesive medium is an ultraviolet light releasable medium.

6. The method as claimed in claim 4, wherein the adhesive medium is a heat releasable medium.

7. The method as claimed in claim 4, wherein the adhesive medium is a combination of an ultraviolet light and heat releasable medium.

8. The method as claimed in claim 4, wherein the adhesive medium comprises a thermoplastic organic material.

9. The method as claimed in claim 4, wherein the adhesive medium comprises an ultraviolet light sensitive organic material.

10. The method as claimed in claim 1, wherein the perforated tape comprises a tape having adhesive on two sides and a flexible film.

11. The method as claimed in claim 10, wherein the flexible film is transmissive to UV radiation.

12. The method as claimed in claim 1, wherein the perforated tape comprises a flexible film with an adhesive medium on one side.

13. The method as claimed in claim 12, wherein the flexible film is transmissive to UV radiation.

15. The method as claimed in claim 1, wherein the perforated tape comprises a plurality of layers of perforated tape, an aggregate of the plurality of layers of perforated tape producing the height to prevent electrostatically induced damage.

16. The method as claimed in claim 1, wherein the layer of dicing tape has a UV releasable adhesive.

17. The method as claimed in claim 1, wherein the layer of dicing tape is applied to the back side of the MEMS wafer after the wafer cap is mounted on the MEMS wafer.

18. The method as claimed in claim 1, wherein the layer of dicing tape is applied to the back side of the MEMS wafer before the wafer cap is mounted on the MEMS wafer.

19. The method as claimed in claim 1, wherein the wafer cap comprises a wafer cover and a spacer layer.

20. The method as claimed in claim 19, wherein the spacer layer comprises a flexible film with an adhesive medium on one side.

21. The method as claimed in claim 20, wherein the flexible film is transmissive to UV radiation.

22. The method as claimed in claim 19, wherein the wafer cover is a cover tape.

26. The method as claimed in claim 1, wherein the layer of transfer tape is applied to the dicing tape after the layer of dicing tape and the laminated MEMS wafer are sawn.

27. The method as claimed in claim 1, wherein the layer of dicing tape has a UV releasable adhesive.

28. The method as claimed in claim 1, further comprising the step of:

(d) removing the individual diced dies from the wafer.

29. The method as claimed in claim 28, wherein individual dies are removed by initially exposing the dicing tape to UV radiation and disengaging the dies from the dicing tape with a die ejection needle assembly.

14. The method as claimed in 1, wherein a height of the perforated tape prevents electrostatically induced damage.

23. The method as claimed in 19, wherein a height of the spacer layer prevents the wafer cover from deflecting in such a manner to come in contact with the MEMS structures.

24. The method as claimed in 19, wherein a height of the spacer layer prevents electrostatically induced damage to the MEMS wafer.

25. The method as claimed in 19, wherein a height of the spacer layer prevents electrostatically induced damage to the MEMS wafer and prevents the wafer cover from deflecting in such a manner to come in contact with the MEMS structures.