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CMOS device

  • US 7,022,561 B2
  • Filed: 12/02/2002
  • Issued: 04/04/2006
  • Est. Priority Date: 12/02/2002
  • Status: Active Grant
First Claim
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1. A method, comprising:

  • providing a substrate having an NMOS device adjacent a PMOS device;

    forming a first stress layer over the NMOS and PMOS devices, the first stress layer comprising one of a first tensile-stress layer and a compression-stress layer;

    forming an etch stop layer over the first stress layer;

    removing the first stress layer and the etch stop layer from over the NMOS device, leaving the first stress layer and the etch stop layer over the PMOS device;

    forming a second tensile-stress layer over the NMOS device and over the first stress layer and the etch stop layer over the PMOS device; and

    removing the second tensile-stress layer and the etch stop layer from over the PMOS device, leaving the second tensile-stress layer over the NMOS device.

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