Boosting to control programming of non-volatile memory
First Claim
1. A method for programming non-volatile storage, comprising:
- applying a source of boosting to a first non-volatile storage element;
discouraging boosting of said first non-volatile storage element during a first time period while applying said source of boosting;
allowing boosting of said first non-volatile storage element during a second time period while applying said source of boosting so that said first non-volatile storage element experiences boosting; and
programming said first non-volatile storage element while said first non-volatile storage element is at least partially boosted.
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Accused Products
Abstract
A system is disclosed for programming non-volatile memory with greater precision. In one embodiment, the system includes applying a first phase of a boosting signal to one or more unselected word lines for a set of NAND strings, applying a programming level to selected bit lines of the NAND strings while applying the first phase of the boosting signal, and applying an inhibit level to unselected bit lines of the NAND strings while applying the first phase of the boosting signal. Subsequently, a second phase of the boosting signal is applied to the one or more unselected word lines and the signal(s) on the selected bit lines are changed by applying the inhibit level to the selected bit lines so that NAND strings associated with the selected bit lines will be boosted by the second phase of the boosting signal. A program voltage signal is applied to a selected word line in order to program storage elements connected to the selected word line.
112 Citations
49 Claims
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1. A method for programming non-volatile storage, comprising:
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applying a source of boosting to a first non-volatile storage element; discouraging boosting of said first non-volatile storage element during a first time period while applying said source of boosting; allowing boosting of said first non-volatile storage element during a second time period while applying said source of boosting so that said first non-volatile storage element experiences boosting; and programming said first non-volatile storage element while said first non-volatile storage element is at least partially boosted. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15)
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16. A method for programming NAND flash memory, comprising:
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applying a first boosting phase to a set of NAND strings, each NAND string having multiple storage elements; while applying said first boosting phase, asserting a first bit line condition for a first bit line, said first bit line condition discourages boosting for a first NAND string of said set of NAND strings, said first NAND string is selected for programming; changing said first bit line from said first bit line condition that discourages boosting to a second bit line condition that encourages boosting for said first NAND string; applying a second boosting phase to said set of NAND strings after changing said first bit line; and programming a storage element on said first NAND string while said first NAND string is at least partially boosted from said second boosting phase. - View Dependent Claims (17, 18, 19, 20, 21)
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22. A method for programming NAND flash memory, comprising:
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applying a first phase of a boosting signal to one or more unselected word lines for a set of NAND strings; applying a programming level to selected bit lines of said NAND strings while applying said first phase of said boosting signal; applying an inhibit level to unselected bit lines of said NAND strings while applying said first phase of said boosting signal; applying a second phase of said boosting signal to said one or more unselected word lines; changing said selected bit lines by applying said inhibit level to said selected bit lines so that NAND strings associated with said selected bit lines will be at least partially boosted by said second phase of said boosting signal; and applying a program voltage signal to a selected word line in order to program storage elements connected to said selected word line and associated with selected bit lines. - View Dependent Claims (23, 24, 25, 26, 27)
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28. A method for programming NAND flash memory, comprising:
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applying a set of boosting phases to one or more unselected word lines for a set of NAND strings; applying a programming level to selected bit lines of said NAND strings while applying a first phase of said boosting signal; applying an inhibit level to unselected bit lines of said NAND strings while applying said first phase of said boosting signal; changing selected bit lines by applying said inhibit level to said selected bit lines after different boosting phases based on a target programming level; and applying a program voltage signal to a selected word line in order to program storage elements connected to said selected word line and on selected bit lines.
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29. A non-volatile memory system, comprising:
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a first non-volatile storage element; and a control circuit, said control circuit applies a source of boosting to said first non-volatile storage element, discourages boosting of said first non-volatile storage element during a first time period while applying said source of boosting, allows boosting of said first non-volatile storage element during a second time period while applying said source of boosting so that said first non-volatile storage element experiences at least some boosting, and causes said first non-volatile storage element to be programmed while said first non-volatile storage element is at least partially boosted. - View Dependent Claims (30, 31, 32, 33, 34, 35, 36, 37, 38, 39)
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40. A non-volatile memory system, comprising:
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a set of NAND strings, each NAND string having multiple storage elements; and a control circuit, said control circuit asserts a first bit line condition on a first bit line such that said first bit line condition discourages boosting of a first NAND string selected for programming while applying a first boosting phase to said set of NAND strings, said control circuit changes said first bit line from said first bit line condition that discourages boosting to a second bit line condition that encourages boosting and applies a second boosting phase to said set of NAND strings after changing said first bit line, and said control circuit programs a storage element on said first NAND string while said first NAND string is at least partially boosted from said second boosting phase. - View Dependent Claims (41, 42, 43, 44, 45)
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46. A non-volatile memory system, comprising:
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a set of NAND strings, each NAND string having multiple storage elements; a set of bit lines connected to said NAND strings, a subset of said bit lines are selected for programming; a set of word lines, each word line connects to storage elements on multiple NAND strings, one of said word lines is selected for programming; and a control circuit, said control circuit applying a first phase of a boosting signal to one or more unselected word lines, applies a programming level to selected bit lines while applying said first phase of said boosting signal, applies an inhibit level to unselected bit lines while applying said first phase of said boosting signal, applies a second phase of said boosting signal to said one or more unselected word lines, changes said selected bit lines by applying said inhibit level to said selected bit lines so that NAND strings associated with said selected bit lines will be at least partially boosted by said second phase of said boosting signal, and applies a program voltage signal to said selected word line in order to program storage elements connected to said selected word line and on selected bit lines. - View Dependent Claims (47, 48, 49)
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Specification