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Demodulation and synchronization establishment apparatus

  • US 7,023,940 B2
  • Filed: 09/19/2001
  • Issued: 04/04/2006
  • Est. Priority Date: 09/22/2000
  • Status: Active Grant
First Claim
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1. A synchronization establishment apparatus operable to establish synchronization from a received signal that contains a synchronization establishment signal whose change in phase periodically alternates between positive and negative, said synchronization establishment apparatus comprising:

  • positive/negative change timing detection means for detecting a timing of changes in the positive/negative polarity of the change in phase of the synchronization establishment signal contained in the received signal;

    synchronization establishment means for establishing synchronization from the received signal based on the timing detected by said positive/negative change timing detection means;

    an A/D converter operable to convert the received signal from an analog signal to a digital signal;

    a phase detection circuit operable to, based on the converted digital signal, demodulate I component data and Q component data, acquire the phase corresponding to the absolute value of the I component data and the absolute value of the Q component data, output a value which is the value of the acquired phase to which a negative polarity is applied when the positive/negative polarity of the I component data and the positive/negative polarity of the Q component data are different, and output a value which is the value of the acquired phase to which a positive polarity is applied when the positive/negative polarity of the I component data and the Q component data are the same;

    an offset level generation circuit operable to generate and output an offset value which is equivalent to a phase rotation due to π

    /4-shift QPSK;

    a first adder operable to add the value outputted from said phase detection circuit to the offset value outputted from said offset level generation circuit, and to output an added value;

    an unwrap circuit operable to output an offset value that corrects discontinuity data when the phase has been rotated by π

    ;

    a second adder operable to add the added value outputted from said first adder to the offset value outputted from said unwrap circuit, and to output a second added value;

    a filter circuit operable to filter the second added value outputted from said second adder and to outputs the filtered second added value;

    a polarity bit converter operable to output data of different values when the polarity of the filtered second added value outputted from said filter circuit is positive than when the polarity of the filtered second added value is negative;

    a change point extraction circuit operable to, based on the data outputted from said polarity bit converter, extract the positive/negative change points in the value of the waveform of the phase difference;

    a change point measurement circuit operable to average the positive/negative change point timing of the phase difference extracted by said change point extraction circuit, and to output the averaged positive/negative change point timing;

    a clock synchronization establishment circuit operable to, based on the averaged positive/negative change point timing outputted from said change point measurement circuit, establish clock synchronization; and

    a timing generation circuit operable to, based on the timing at which the received signal starts, determine the position to reset a clock.

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