Ultrahigh-speed clock extraction circuit

• US 7,024,122 B2
• Filed: 11/01/2002
• Issued: 04/04/2006
• Est. Priority Date: 11/02/2001
• Status: Expired due to Fees

• Current Assignee: Nippon Telegraph and Telephone Corporation
• Original Assignee: Nippon Telegraph and Telephone Corporation
• Inventors: Takara, Hidehiko, Yamada, Eiichi, Morioka, Toshio, Hashimoto, Etsu, Uchiyama, Kentaro
• Primary Examiner(s): Leung, Christina Y
• Application Number:
  US10/285,525
• Publication Number:
  US 20030117196A1
• Time in Patent Office: 1,250 Days
• Field of Search: 398/154, 398/155, 398/163, 398/175, 398/176
• US Class Current: 398/155
• CPC Class Codes: H03L 2207/10 Indirect frequency synthesis using a frequency multiplier in the phase-locked loop or in the reference signal path
• CPC Class Codes: H03L 7/08 Details of the phase-locked loop
• CPC Class Codes: H03L 7/18 using a frequency divider or counter in the loop H03L7/20, H03L7/22 take precedence
• CPC Class Codes: H04J 14/02 Wavelength-division multiplex systems
• CPC Class Codes: H04L 61/10 of different types
• CPC Class Codes: H04L 61/50 Address allocation
• CPC Class Codes: H04L 7/0075 with photonic or optical means
• CPC Class Codes: H04L 7/033 using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop

Abstract

In an ultrahigh-speed clock extraction circuit wherein a local pulse generating light source 22 for generating a local optical pulse stream synchronized in bit phase with an input optical signal pulse stream is placed in a phase-locked loop, when repetition frequencies of the input optical signal pulse stream and the local optical pulse stream bear a particular relationship, a frequency demultiplier 32 and multipliers 43 and 52 are set so that the frequency of a modulation signal for an optical modulator 41 and a frequency which is a natural-number multiple of the modulation signal frequency, and the frequency of a down-converted version of an optical pulse stream output from a photodetector 42 differ from each other.

Claims

1. An ultrahigh-speed clock extraction circuit for obtaining a local clock synchronized in bit phase with an input optical signal pulse stream, said extraction circuit comprising:

a local clock generating part which generates a local clock of a frequency controlled by a voltage control signal and branches the local clock into a local output clock and a local feedback clock;

a local feedback signal generating part which generates a local feedback signal from said local feedback clock;

an input signal component generating part made up of a modulation signal generating part for generating a modulation signal containing phase information of said local feedback signal, an optical modulator for modulating an input optical signal pulse stream by said modulation signal to generate a modulated input optical signal stream, and a photodetector supplied with said modulated input optical signal pulse stream, for outputting an input signal component electrical signal having a down-converted frequency of said modulated input optical signal pulse stream and having bit-phase information thereof;

a phase comparison part which compares the phases of said local feedback signal and said input signal component electrical signal and outputs, as said voltage control signal, the voltage corresponding to their phase difference; and

ratio setting means which sets the frequency of said local feedback signal to an integral fraction of the frequency of said output local clock so that said down-converted frequency of said input signal component electrical signal differs from a natural-number multiple of the frequency of said modulation signal;

wherein a path containing said phase comparison part, said local clock generating part and said local feedback signal generating part constitutes a phase-locked loop for said input signal component electrical signal.

2. The circuit of claim 1, wherein said local clock generating part comprises a voltage-controlled oscillator for generating a drive signal of a frequency controlled by said voltage control signal, a local pulse generating light source driven by said drive signal to generate a local optical pulse stream, and an optical branching device for branching said local optical pulse stream into said output local clock and said local feedback clock;

and

wherein said local feedback signal generating part comprises a photodetector for converting said local feedback clock to a local electrical signal, and a frequency demultiplier for frequency-demultiplying said local electrical signal down to 1/K to generate said local feedback signal, said K being an integer equal to or greater than 1 and said frequency demultiplier forming said ratio setting means.

3. The circuit of claim 1, wherein said local clock generating part comprises a voltage-controlled oscillator for generating a local clock of a frequency controlled by said voltage control signal, and a J multiplier for J-multiplying one of two branched versions of said local clock from said voltage-controlled oscillator to provide an output local clock, said J being an integer equal to or greater than 2;

wherein said local feedback signal generating part includes a 1/K frequency demuliplier for frequency-demultiplying the other branched version of said local clock down to 1/K to provide said local feedback signal, said K being an integer equal to or greater than 1; and

wherein said J multiplier and said 1/K frequency demultiplier constitute said ratio setting means.

4. The circuit of claim 1, wherein said local clock generating part comprises a voltage-controlled oscillator for generating a drive signal of a frequency controlled by said voltage control signal, a local pulse generating light source driven by said drive signal to generate local optical pulse stream, an optical branching device for branching said local optical pulse stream into two outputs, one of said two branched outputs being provided as said output local clock, and an optical frequency demultiplier for frequency demultiplying the other of said two branched outputs down to 1/J to generate said local feedback clock, said J being an integer equal to or greater than 2;

wherein said local feedback signal generating part comprises a photodetector for converting said local feedback clock to a local electrical signal, and a frequency demultiplier for frequency demultiplying said local electrical signal down to 1/K to generate said local feedback signal, said K being an integer equal to or greater than 1; and

wherein said optical frequency demultiplier and said frequency demultiplier constitute said ratio setting means.

5. The circuit of claim 1, wherein said local clock generating part comprises a voltage-controlled oscillator for generating a drive signal of a frequency controlled by said voltage control signal, a local pulse generating light source driven by said drive signal to generate a local optical pulse stream, an optical branching device for branching said local optical pulse stream into two outputs, one of said two branched output being provided as said local feedback clock, and an optical multiplier for J-multiplying the other of said two branched output to generate said output local clock, said J being an integer equal to or greater than 2 and said optical multiplier forming said ratio setting means;

and

wherein said local feedback signal generating part includes a photodetector for converting said local feedback optical pulse stream to a local feedback signal.

6. The circuit of claim 1, wherein said local clock generating part comprises a voltage-controlled oscillator for generating a drive signal of a frequency controlled by said voltage control signal, a local pulse generating light source driven by said drive signal to generate a local optical pulse stream, an optical branching device for branching said local optical pulse stream into two outputs, one of said two branched output being provided as said local feedback clock, and an optical multiplier for J-multiplying the other of said two branched output to generate said output local clock, said J being an integer equal to or greater than 2 and said optical multiplier forming said ratio setting means;

and

wherein said local feedback signal generating part comprises photodetector for converting said local feedback clock into a local electrical signal, and a 1/K frequency demultiplier for frequency demultiplying said local electrical signal down to 1/K to generate said local feedback signal, said K being an integer equal to or greater than 2 and said optical multiplier and said 1/K frequency demultiplier constituting said ratio setting means.

7. The circuit of any one of claims 1 to 6, wherein said optical modulator is an intensity modulator.

8. The circuit of any one of claims 1 to 6, wherein said optical modulator is an electroabsorption optical modulator.

9. The circuit of any one of claims 1 to 6, wherein said optical modulator is an optical comb generator.

10. The circuit of any one of claims 1 to 6, wherein said optical modulator is an optical phase modulator.

11. The circuit of any one of claims 1 to 6, wherein said optical modulator is a semiconductor optical amplifier.

12. The circuit of any one of claims 1 to 6, wherein said phase comparison part comprises a multiplier for M-multiplying said local feedback signal from said local feedback signal generating part, said M being an integer equal to or greater than 1, and a phase comparator for detecting a phase difference between the output from said multiplier and said input signal component electrical signal from said input signal component generating part and for outputting said detected phase difference as said voltage control signal.

13. The circuit of any one of claims 1 to 6, wherein said modulation signal generating part is a multiplier for L-multiplying said local negative feedback signal to generate said modulation signal, said L being an integer equal to or greater than 1.