System and method for configuring analog elements in a configurable hardware device

• US 7,024,654 B2
• Filed: 06/11/2002
• Issued: 04/04/2006
• Est. Priority Date: 06/11/2002
• Status: Expired due to Term

• Current Assignee: F Poszat Hu LLC (Intellectual Ventures LLC)
• Original Assignee: Anadigm Limited
• Inventors: Streit, Timothy James, Anderson, Howard C., Bersch, Danny Austin, Nottingham, Brian Eugene, Macbeth, Ian Craig, Giles, Troy Franklin
• Primary Examiner(s): Smith, Matthew
• Assistant Examiner(s): LEVIN, NAUM B
• Application Number:
  US10/171,334
• Publication Number:
  US 20030229877A1
• Time in Patent Office: 1,393 Days
• Field of Search: 716/1, 716/2, 716 16- 18, 703 13- 17, 703 21- 22, 703/28, 714 32- 33, 326 39- 45, 712/35, 712/41
• US Class Current: 716/117
• CPC Class Codes: G06F 30/34 for reconfigurable circuits, e.g. field programmable gate arrays [FPGA] or programmable logic devices [PLD]
• CPC Class Codes: G06F 30/343 Logical level
• CPC Class Codes: G06F 30/36 Circuit design at the analogue level
• CPC Class Codes: G06F 30/38 Circuit design at the mixed level of analogue and digital signals

Abstract

A system is provided for programming a configurable semiconductor device. The system includes a programmable controlling device, a programmable computing device, a communication link, a configurable hardware device, a design tool with first computer program code, and second computer program code. The configurable hardware device has memory with a plurality of memory locations and coupled with the programmable controlling device via the communication link. The design tool includes first computer program code embodied in a programmable computing device. The second computer program code is generated at least in part by the first computer program code and is embodied in the programmable controlling device for: a) applying configuration data to selected memory locations within the configurable hardware device to configure the configurable hardware device; b) determining a location of a subset of at least one of (i) the programmable memory locations in the configurable hardware device and (ii) the configuration data to be modified; and c) determining a new data value to be applied to the subset of at least one of (i) the memory locations in the configurable hardware device and (ii) the configuration data. The design tool provides at least one of configuration data, address data, and a data value algorithm usable in performing at least one of a), b), and c). A method is also provided.

Claims

1. A system for programming a configurable semiconductor device, comprising:

a programmable controlling device;

a programmable computing device;

a communication link;

a configurable hardware device having memory with a plurality of memory locations and coupled with the programmable controlling device via the communication link;

a design tool comprising a first computer program code embodied in a programmable computing device; and

a second computer program code generated at least in part by the first computer program code and embodied in the programmable controlling device for;

a) applying a configuration data to selected memory locations within the configurable hardware device to configure the configurable hardware device;

b) determining a location of a subset of at least one of (i) the programmable memory locations in the configurable hardware device and (ii) the configuration data to be modified; and

c) determining a new data value to be applied to the subset of at least one of (i) the memory locations in the configurable hardware device and (ii) the configuration data;

wherein the design tool provides at least one of a configuration data, address data, and a data value algorithm usable in performing at least one of a), b), and c).

2. The system of claim 1 wherein the design tool automatically provides at least one of configuration data, address data, and data value algorithms.

3. The system of claim 1 wherein at least one of the configuration data, address data and data value algorithms is used to perform at least one of a), b), and c).

4. The system of claim 1 wherein the programmable computing device and the programmable controlling device are provided by a common device.

5. The system of claim 1 wherein the programmable computing device comprises a stand-alone computer-aided design computer and the programmable controlling device comprises a micro-controller resident on an application board.

6. The system of claim 1 wherein the programmable controlling device is close-coupled with the configurable hardware device.

7. The system of claim 1 wherein the programmable controlling device comprises a microprocessor.

8. The system of claim 1 wherein the programmable controlling device comprises a micro-controller.

9. The system of claim 1 wherein the programmable controlling device comprises a field programmable gate array.

10. The system of claim 1 wherein the programmable controlling device comprises a digital signal processor.

11. The system of claim 1 wherein the configurable hardware device comprises a programmable logic device.

12. The system of claim 1 wherein the configurable hardware device comprises a field programmable analog array.

13. The system of claim 1 wherein the configurable hardware device comprises a field programmable gate array.

14. The system of claim 1 wherein the configurable hardware device comprises a digital signal processor.

15. The system of claim 1 wherein the programmable controlling device is configured to dynamically create modified configuration data.

16. The system of claim 1 wherein the configurable hardware device comprises configurable hardware and configuration data registers for receiving configuration data that configures the configurable hardware.

17. The system of claim 1 wherein the first computer program code comprises a controller program including algorithms operative to translate user specified parameters received by the design tool into component values and topologies.

18. The system of claim 17 wherein the algorithms comprise code routines.

19. The system of claim 18 wherein the code routines comprise ‘

C’

language code.

20. The system of claim 18 wherein the code routines are generated to implement modification of circuits that were previously generated by a user during design of the configurable hardware using the design tool.

21. The system of claim 17 wherein the controller pro gram includes a set of program code routines configured to implement calculation routines.

22. The system of claim 17 wherein the controller program includes a set of program code routines configured to implement configuration data assembly.

23. The system of claim 17 wherein the controller program includes a set of program code routines configured to implement check sum creation.

24. The system of claim 17 wherein the controller program includes a set of program code routines configured to implement relocation of functions within the configurable device.

25. The system of claim 24 wherein the controller program includes computer-aided design computer program code that combines place &

route circuit information with the set of program code routines and generates “

C”

code specific to a circuit implemented by the configuration data.

26. The system of claim 25 wherein object code derived from the “

C”

code is capable of being directly imported via a compiler when generating the second computer program code to enable reconfiguration of the configurable device.

27. The system of claim 1 wherein the first computer program code comprises a device configuration program including algorithms operative to provide information on the configurable device to enable dynamic creation of modified configuration data for the controlling device.

28. The system of claim 17 wherein the controller program enables a user to modify circuit performance parameters from circuit performance parameters corresponding with an initial configuration of the configurable device.

29. The system of claim 17 wherein the controller program enables a user to create configuration data via the programmable controlling device that imparts new functionality to the configurable device over functionality initially imparted to the configurable device.

30. The system of claim 17 wherein the controller program enables a user to reallocate device resources to realize a configuration of the configurable device that achieves functionality equivalent to another configuration of the configurable device.

31. The system of claim 17 wherein the controller program enables creation of modified configuration data for the controlling device independent of the design tool used to originally configure the configurable device.

32. The system of claim 1 wherein the programmable controlling device is configured, after configuring the configurable hardware device, to adjust performance parameters of the configurable hardware device, and wherein the computer program code embodied in the programmable controlling device generates new configuration data to adjust performance parameters for the configurable hardware device.

33. A system for configuring a programmable device, comprising:

a first programmable device;

a second programmable device having configurable hardware and configuration data registers for configuring the configurable hardware, the second programmable device communicating with the first programmable device;

a programmable computing device having a design tool with first computer program code for generating at least one of a configuration data, an address data, and algorithms; and

second computer program code generated at least in part by the first computer program code, incorporating at least one of the generated configuration data, the address data, and algorithms for determining data values, and embodied in the first programmable device for;

a) applying the configuration data to selected memory locations within the configurable hardware device;

b) determining a subset of at least one of (i) the programmable memory locations in the configurable hardware device and (ii) the configuration data to be modified; and

c) determining a new value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data.

34. The system of claim 33 further comprising a bi-sectional communication link interposed between the first programmable device and the second programmable device.

35. The system of claim 33 wherein the first programmable device comprises a programmable controlling device.

36. The system of claim 33 wherein the second programmable device comprises a configurable hardware device.

37. The system of claim 33 wherein the first computer program code comprises a controller program including algorithms used to translate user specified parameters into component values and topologies.

38. The system of claim 33 wherein the first computer program code comprises algorithms that provide information about the configurable device to enable dynamic creation of modified configuration data for the controlling device.

39. The system of claim 33 wherein the first programmable device is programmed to write configuration data to at least one of the configuration data registers within the second programmable device in order to configure the second programmable device.

40. The system of claim 33 wherein the first programmable device is close-coupled with the second programmable device and is constructed and arranged to configure the second programmable device.

41. The system of claim 40 wherein, subsequent to configuring the second programmable device, the first programmable device is constructed and arranged to adjust at least one performance parameter for the second programmable device by modifying configuration data within the configuration data registers of the second programmable device.

42. The system of claim 40 wherein, subsequent to configuring the second programmable device, the first programmable device is constructed and arranged to render a circuit implementation for the second programmable device by enabling modification of configuration data within the configuration data registers of the second programmable device.

43. A method of implementing configuration or reconfiguration of analog elements provided in a configurable hardware device, comprising:

providing a configurable hardware device communicating with a programmable controlling device;

generating a hardware design including analog elements;

generating a computer program code that provides at least one of a data and an algorithm usable in carrying out at least one of;

configuring the analog elements by applying the configuration data to selected memory locations within the configurable hardware device;

determining a location of a subset of at least one of (i) the programmable memory locations and (ii) the configuration data to be modified; and

determining a new data value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data;

incorporating the computer program code into an application for updating configuration of the configurable hardware device; and

delivering the application to the programmable controlling device for reconfiguring the configurable hardware device.

44. The method of claim 43 further comprising updating the configuration data of the configurable hardware device via the programmable controlling device to reconfigure the hardware of the configurable hardware device.

45. The method of claim 43 wherein incorporating comprises compiling the computer program code for use by the programmable controlling device to enable selective modification of the configuration data for the hardware of the configurable hardware device using the compiled program code.

46. The method of claim 43 wherein the configurable hardware device comprises configurable hardware and configuration data registers for configuring the configurable hardware, and further comprising storing the generated configuration data in the configuration data registers to render reconfiguration of the configurable hardware.

47. The method of claim 43 further comprising transferring the generated computer program code from the programmable controlling device to the configurable hardware device to reconfigure the hardware within the configurable hardware device.

48. The method of claim 43 wherein the programmable controlling device includes a user interface, and further comprising receiving parameter changes from a user at the user interface that modify the configuration data for the hardware.

49. The method of claim 48 further comprising mapping the parameter changes onto the configuration data to enable reconfiguration of the hardware.

50. The method of claim 43 wherein generating computer program code comprises incorporating data values representing changes to an analog circuit element of the configurable hardware device to be applied to the configuration data for configuring the hardware.

51. The method of claim 43 further comprising automatically providing information about placement of hardware components within the configurable hardware device to the programmable controlling device.

52. The method of claim 43 wherein the configurable hardware device comprises a field programmable analog array, and further comprising reconfiguring at least one analog element of the field programmable analog array in response to launching the application program from the programmable controlling device to the configurable hardware device so as to write configuration data to configuration data registers of the field programmable analog array.

53. The method of claim 52 further comprising modifying the configuration data for the field programmable analog array using the generated computer program code in combination with user input in order to reconfigure the at least one analog element.

54. A method of configuring a field programmable analog array, the field programmable analog array being connected to a programmable controlling device, comprising:

providing a hardware design for at least one analog element within the field programmable analog array;

generating a computer program code including at least one of a data set and a process usable to;

configure the analog elements by applying a configuration data to selected programmable memory locations within the field programmable analog array;

determine a location of a subset of at least one of (i) the memory locations and (ii) the configuration data to be modified; and

determine a new data value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data;

generating an application program incorporating at least in part the computer program code operative to update configuration of the field programmable analog array;

receiving the application program at the programmable controlling device;

with the application program, programming the programmable controlling device with instructions to write configuration data to at least one configuration data register within the field programmable analog array;

writing the configuration data to the at least one configuration data register of the field programmable analog array; and

configuring hardware within the field programmable analog array in response to writing the configuration data to the at least one configuration data register.

55. The method of claim 54 further comprising exporting configuration data to the field programmable analog array from the programmable controlling device.

56. The method of claim 54 wherein the application program comprises device specific mapping information.

57. The method of claim 56 further comprising embodying computer program code in algorithms stored in memory of the programmable controlling device for mapping the field programmable analog array into a desired device configuration.

58. The method of claim 54 wherein the application program comprises design-to-device mapping information.

59. The method of claim 58 wherein the design-to-device mapping information comprises hardware configuration data, design-to-device memory map data, and design modification algorithms.

60. The method of claim 54 wherein the application program comprises design specific mapping information.

61. The method of claim 60 further comprising embodying computer program code in algorithms stored in memory of the programmable controlling device for implementing function parameter calculations.

62. A method in a computer system for reconfiguring an analog hardware in a configurable hardware device, the method comprising:

providing an analog hardware design;

rendering a computer program code that automatically incorporates at least one of algorithms and data usable in performing at least one of the following operations;

a) configuring the analog elements by applying a configuration data to selected memory locations within the configurable hardware device;

b) determining a location of a subset of at least one of (i) the programmable memory locations and (ii) the configuration data to be modified; and

c) determining a new data value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data;

rendering an application program based at least in part on the computer program code for updating configuration of the configurable hardware device;

communicating with a configurable hardware device via the programmable controlling device, the configurable hardware device having configuration data within at least one configuration data register for configuring analog hardware within the configurable hardware device;

receiving user input at the programmable controlling device comprising instructions that cooperate with the application program to write new configuration data to a configuration data register within the configurable hardware device;

writing the new configuration data to the at least one configuration data register; and

reconfiguring the analog hardware within the configurable hardware device using the new configuration data.

63. The method of claim 62 wherein the configurable hardware device comprises a field programmable analog array.

64. The method of claim 62 wherein the computer program code includes exported device information for use by the programmable controlling device to reconfigure the analog hardware of the configurable hardware device.

65. The method of claim 62 further comprising storing the new configuration data in the configuration data registers to reconfigure the analog hardware.

66. The method of claim 62 wherein writing the new configuration data comprises transferring computer data from the programmable controlling device to the configurable hardware device to reconfigure the hardware within the configurable hardware device.

67. The method of claim 62 wherein user input is received via a user program of the programmable controlling device, and wherein the user input is combined with configuration data from a computer-aided design tool that includes a user functional description of an analog circuit.

68. A method in a computer system for reconfiguring a configurable hardware device, comprising:

providing a programmable controlling device in communication with the configurable hardware device;

receiving a computer program code at the programmable controlling device that incorporates at least one of algorithms and data usable to;

configure the analog elements by applying a configuration data to selected memory locations within the configurable hardware device;

determine a location of a subset of at least one of (i) the programmable memory locations and (ii) the configuration data to be modified; and

determine a new data value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data; and

receiving user input at the programmable controlling device; and

using the computer program code and the user input, reconfiguring the configurable hardware device from a first configuration to a second configuration.

69. The method of claim 68 further comprising programming the programmable controlling device with instructions to write configuration data to at least one configuration data register within the configurable hardware device.

70. The method of claim 68 further comprising providing device information for the configurable hardware device to the programmable controlling device to enable the programmable controlling device to write configuration data to data registers within the configurable hardware device to configure the configurable hardware device into the second configuration.

71. The method of claim 70 wherein exporting device information comprises exporting configuration data for the configurable hardware device.

72. The method of claim 71 wherein exporting configuration data comprises exporting a configuration file comprising data representing a circuit.

73. The method of claim 72 wherein the configuration file comprises a map file comprising a set of data having a corresponding relationship with another set of data.

74. A method of configuring a field programmable analog array, the field programmable analog array being connected to a host processor for configuration thereby, the method comprising:

with a design tool, generating a first computer program code that provides at least one of a configuration data, address data, and algorithms;

generating a second computer program code using at least part of the first computer program code;

transferring the second computer program code to the host processor;

configuring the field programmable analog array by applying a configuration data to selected memory locations within the configurable hardware device;

determining a location of a subset of at least one of (i) the programmable memory locations and (ii) the configuration data to be modified;

determining a new data value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data; and

receiving user input at the host processor comprising new configuration data.

75. The method of claim 74 further comprising writing the new configuration data to the configuration data registers within the field programmable analog array.

76. The method of claim 75 further comprising reconfiguring the field programmable analog array according to the new configuration data.

77. The method of claim 74 wherein, prior to programming the programmable controlling device, configuring the field programmable analog array with an initial set of configuration data.

78. The method of claim 75 wherein, after configuring the field programmable analog array, reconfiguring the field programmable analog array by overwriting at least part of the initial set of configuration data with the new configuration data.

79. The method of claim 74 wherein writing the new configuration comprises dynamically updating the new configuration data to the configuration data register to dynamically reconfigure the field programmable analog array.

80. The method of claim 74 wherein the first computer program code automatically provides at least one of configuration data, address data, and algorithms.

81. A system for programming a configurable semiconductor device, comprising:

a programmable semiconductor device specifically constructed to accept programming data that configures a configurable semiconductor device to;

a) configure the configurable semiconductor device by applying a configuration data to selected memory locations within the configurable semiconductor device;

b) determine a location of a subset of at least one of (i) the programmable memory locations and (ii) the configuration data to be modified;

c) determine a new data value to be applied to the subset of at least one of (i) the memory locations and (ii) the configuration data; and

d) enable a user to interact via a programmable controlling device coupled with the programmable semiconductor device to reconfigure at least one analog component of the programmable semiconductor device.

82. The system of claim 81 wherein the programmable semiconductor device comprises a field programmable analog array.