System and method for resetting a platform configuration register

• US 7,028,149 B2
• Filed: 03/29/2002
• Issued: 04/11/2006
• Est. Priority Date: 03/29/2002
• Status: Active Grant

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Sutton, James A. II, Grawrock, David W.
• Primary Examiner(s): Peikari, B. James
• Assistant Examiner(s): Li, Zhuo H.
• Application Number:
  US10/112,124
• Publication Number:
  US 20030188113A1
• Time in Patent Office: 1,474 Days
• Field of Search: 713176-200, 713164-166, 713/156, 713169-170, 711163-166, 711/156, 711/100, 711104-105, 711109-111, 711/101, 365/189.12, 365195-196, 365/212, 710/5, 710 15- 16
• US Class Current: 711/156
• CPC Class Codes: G06F 21/00 Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
• CPC Class Codes: G06F 21/57 Certifying or maintaining trusted computer platforms, e.g. secure boots or power-downs, version controls, system software checks, secure updates or assessing vulnerabilities
• CPC Class Codes: G06F 21/78 to assure secure storage of data address-based protection against unauthorised use of memory G06F12/14; record carriers for use with machines and with at least a part designed to carry digital markings G06K19/00

Abstract

A method and apparatus for resetting and modifying special registers in a security token is described. In one embodiment, a register may be reset when a reset flag is true when a special transmission on a bus demonstrates the mutual locality of the associated processor and chipset. A modify flag may also be used to indicate whether the register contents may be modified. Modifications may also be dependent upon demonstration of mutual locality.

Claims

1. A system, comprising:

a circuit including a first register, with a first flag coupled to said first register;

a first bus coupled to said circuit to convey a locality confirming message wherein said first flag indicates permission to reset said first register; and

a second flag coupled to said first register to indicate permission to modify a content of said first register.

2. The system of claim 1, wherein said first flag coupled to said first register indicates permission to modify a content of said first register.

3. The system of claim 2, wherein said content of said first register is capable of being modified during execution of a privileged instruction by a processor.

4. The system of claim 3, further comprising a second register to contain a second digest of a second code.

5. A system, comprising:

a circuit including a first register;

a first bus coupled to said circuit to convey a locality confirming message;

a chipset to transmit said locality confirming message across said first bus, wherein said chipset transmits said locality confirming message responsively to a special bus message; and

a processor to transmit said special bus message on said second bus, wherein said processor transmits said special bus message during an execution of a privileged instruction.

6. An apparatus, comprising:

a first register to store a first digest;

a first flag coupled to said first register to indicate whether to permit said first register to reset responsive to a locality confirming message; and

a second flag coupled to said first register to indicate whether to permit contents of said first register to change responsive to said locality confirming message.

7. An apparatus, comprising:

a first register to store a first digest; and

a first flag coupled to said first register to indicate whether to permit said first register to reset responsive to a locality confirming message;

a second register to store a second digest;

a third flag coupled to said second register to indicate whether to permit said second register to reset responsive to said locality confirming message; and

a fourth flag coupled to said second register to indicate whether to permit contents of said second register to change responsive to said locality confirming message.

8. A method, comprising:

transmitting a first locality confirming message on a first bus;

determining whether to reset a first register responsively to said first locality confirming message;

determining whether to reset said first register responsive to a first flag;

transmitting a second locality confirming message on said first bus;

determining whether to modify a first content of said first register responsively to said second locality confirming message; and

determining whether to modify said first content of said first register responsive to a second flag.

9. The method of claim 8, further comprising transmitting a third locality confirming message on said first bus;

and further comprising determining whether to reset a second register responsively to said third locality confirming message.

10. The method of claim 9, further comprising transmitting a fourth locality confirming message on said first bus;

and further comprising determining whether to modify a second content of said second register responsively to said fourth locality confirming message.

11. The method of claim 8, further comprising transmitting a third locality confirming message on said first bus;

and further comprising determining whether to modify a second content of said first register responsively to said third locality confirming message.

12. The method of claim 9, further comprising modifying said second content of said first register using a cryptological combination with a digest.

13. An apparatus, comprising:

a first register to store a first digest;

a first flag coupled to said first register to indicate whether to permit contents of said first register to be modified responsive to a locality confirming message; and

a second flag coupled to said first register to indicate whether to permit said first register to reset responsive to said locality confirming message.