Cooling system for a semiconductor device and method of fabricating same

• US 7,029,951 B2
• Filed: 09/12/2003
• Issued: 04/18/2006
• Est. Priority Date: 09/12/2003
• Status: Active Grant

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Hsu, Louis L., Shepard, Joseph F. Jr., Chen, Howard Hao
• Primary Examiner(s): Kebede, Brook
• Application Number:
  US10/661,299
• Publication Number:
  US 20050059238A1
• Time in Patent Office: 949 Days
• Field of Search: 438106-126, 438/584, 257/705, 257/706, 257/720, 257/675, 257/678, 257/701, 257/707, 257/787, 257/796
• US Class Current: 438/122
• CPC Class Codes: H01L 21/4871 Bases, plates or heatsinks
• CPC Class Codes: H01L 2224/05001 Internal layers
• CPC Class Codes: H01L 2224/05008 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body, e.g.
• CPC Class Codes: H01L 2224/05099 Material
• CPC Class Codes: H01L 2224/05548 Bonding area integrally formed with a redistribution layer on the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 23/3677 Wire-like or pin-like cooling fins or heat sinks
• CPC Class Codes: H01L 23/473 by flowing liquids H01L23/4332, H01L23/4338 take precedence
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/10158 at the passive surface
• CPC Class Codes: H01L 2924/15311 being a ball array, e.g. BGA

Abstract

A cooling system for a semiconductor substrate incudes a plurality of trenches formed from a backside of the semiconductor substrate, and thermally conductive material deposited in the plurality of trenches. A method of forming cooling elements in a semiconductor substrate, includes coating a backside of the semiconductor substrate with a first mask layer, forming a plurality of trench patterns in the first mask layer, etching the semiconductor substrate to form a plurality of trenches along the plurality of trench patterns, and depositing thermally conductive material in the plurality of trenches. Trenches constructed from the backside of a wafer improve efficiency of heat transfer from a front-side to the backside of an integrated-circuit chip. The fabrication of trenches from the backside of the wafer allows for increases in the depth and number of trenches, and provides a means to attach passive and active cooling devices directly to the backside of a wafer.

Claims

1. A method of forming cooling elements in a semiconductor substrate, comprising:

coating a backside of the semiconductor substrate with a first mask layer;

forming a plurality of trench patterns in the first mask layer;

etching the semiconductor substrate to form a plurality of trenches along the plurality of trench patterns;

depositing thermally conductive material in the plurality of trenches;

forming a first diffusion layer in the semiconductor substrate;

forming a second diffusion layer in the first diffusion layer; and

doping the second diffusion layer with a dopant having a polarity opposite a polarity of the semiconductor substrate.

2. The method as recited in claim 1, further comprising stopping the etching of the semiconductor substrate at the second diffusion layer.

3. The method as recited in claim 1, wherein the first mask layer is a photoresist.

4. The method as recited in claim 1, wherein the trench patterns are formed by optical, x-ray, extreme ultra-violet, electron beam or ion beam lithographic techniques.

5. The method as recited in claim 1, wherein etching of the semiconductor substrate is performed with Cl₂-based plasma.

6. The method as recited in claim 1, wherein the plurality of trenches are formed in the vertical direction.

7. The method as recited in claim 1, wherein the step of depositing thermally conductive material is performed by chemical vapor deposition, atomic layer deposition, physical vapor deposition or electroplating.

8. The method as recited in claim 1, wherein the thermally conductive material is made from aluminum nitride, aluminum, copper-tungsten, silicon carbide, gold, copper, diamond or silver.

9. The method as recited in claim 1, wherein the semiconductor substrate is a complimentary metal oxide semiconductor wafer or a silicon-on-insulator wafer.

10. The method as recited in claim 1, wherein the plurality of trenches are formed in an integrated-circuit chip of the semiconductor substrate.

11. The method as recited in claim 1, wherein the step of etching the semiconductor substrate to form the plurality of trenches is performed away from at least a passivation layer, an interconnect layer, a device layer or a doped well structure of the semiconductor substrate.

12. The method as recited in claim 1, wherein the plurality of trenches are formed before or after processing of remaining portions of the semiconductor substrate.

13. The method as recited in claim 1, further comprising integrating an external heat sink on the backside of the semiconductor substrate.

14. The method as recited in claim 1, further comprising integrating an active cooling apparatus on the backside of the semiconductor substrate.

15. The method as recited in claim 14, wherein the step of integrating the active cooling apparatus on the backside of the semiconductor substrate includes:

coating the backside of the semiconductor substrate with a second mask layer;

patterning the second mask layer;

etching a continuous trench into the backside of the semiconductor substrate;

forming at least one opening in the continuous trench for allowing coolant supplied from the active cooling apparatus to exit or enter the continuous trench; and

positioning the active cooling apparatus on the backside of the semiconductor substrate.

16. The method as recited in claim 14, wherein the active cooling apparatus is a thermal electric cooling component, a micro-fan device or a micropump.

17. The method as recited in claim 14, wherein the active cooling apparatus is directly fabricated on the backside of the semiconductor substrate or separately built and mounted on the backside of the semiconductor substrate.

18. A method of forming an active cooling apparatus on a semiconductor substrate, comprising:

coating the backside of a first semiconductor substrate with a mask layer;

patterning the mask layer;

etching a first continuous trench into the backside of the first semiconductor substrate;

forming at least one opening in the first continuous trench for allowing coolant supplied from the active cooling apparatus to exit or enter the first continuous trench; and

positioning the active cooling apparatus on the backside of the first semiconductor substrate.

19. The method as recited in claim 18, wherein the active cooling apparatus is a thermal electric cooling component, a micro-fan device or a micropump.

20. The method as recited in claim 18, wherein the active cooling apparatus is directly fabricated on the backside of the first semiconductor substrate or separately built and mounted on the backside of the first semiconductor substrate.

21. The method as recited in claim 18, further comprising:

forming a second semiconductor substrate including a second continuous trench; and

fastening the second semiconductor substrate to the first semiconductor substrate at a position between the backside of the first semiconductor substrate and the active cooling apparatus, whereby the active cooling apparatus rests on the second semiconductor substrate.

22. The method as recited in claim 21, wherein the second continuous trench is a mirror image of the first continuous trench of the first substrate.

23. The method as recited in claim 21, wherein the step of fastening includes anodic bonding or metallurgical soldering.

24. The method as recited in claim 21, wherein the second semiconductor substrate includes at least one opening in the second continuous trench for allowing the coolant supplied from the active cooling apparatus to exit or enter the second continuous trench.

25. The method as recited in claim 18, wherein the mask layer is a photoresist.

26. The method as recited in claim 18, wherein the first continuous trench is formed to be larger in the horizontal direction than in the vertical direction.

27. The method as recited in claim 18, wherein the first semiconductor substrate is a complimentary metal oxide semiconductor wafer or a silicon-on-insulator wafer.

28. The method as recited in claim 21, wherein the second semiconductor substrate is a silicon substrate or a plate-glass substrate.

29. The method as recited in claim 18, wherein the first continuous trench is formed in an integrated-circuit chip of the first semiconductor substrate.

30. A method of forming cooling elements in a semiconductor substrate, comprising:

etching the semiconductor substrate from a backside of the semiconductor substrate to form a plurality of trenches;

depositing thermally conductive material in the plurality of trenches;

forming a diffusion layer in the semiconductor substrate; and

doping the diffusion layer with a dopant having a polarity opposite a polarity of the semiconductor substrate.

31. A method of forming an active cooling apparatus on a semiconductor substrate, comprising:

coating the backside of a semiconductor substrate with a mask layer;

patterning the mask layer;

etching a continuous trench into the backside of the semiconductor substrate;

forming two openings in the continuous trench for respectively allowing coolant supplied from the active cooling apparatus to exit and enter the continuous trench; and

positioning the active cooling apparatus on the backside of the semiconductor substrate.

32. The method as recited in claim 31, wherein the coolant is gas or liquid.

33. The method as recited in claim 31, wherein the coolant flows through the continuous trench in a horizontal direction.

34. The method as recited in claim 31, wherein the continuous trench includes a plurality of channels.

35. A method of forming an active cooling apparatus on a semiconductor substrate, comprising:

etching a continuous trench having a plurality of channels into the backside of the semiconductor substrate;

forming an opening in the continuous trench, wherein coolant supplied from the active cooling apparatus passes through the opening; and

positioning the active cooling apparatus on the backside of the semiconductor substrate.