High density integrated circuit package architecture

• US 7,030,486 B1
• Filed: 09/12/2003
• Issued: 04/18/2006
• Est. Priority Date: 05/29/2003
• Status: Expired due to Fees

• Current Assignee: Paul N. Marshall
• Original Assignee: Paul N. Marshall
• Inventors: Marshall, Paul N.
• Primary Examiner(s): Parker, Kenneth
• Assistant Examiner(s): Chu, Chris C.
• Application Number:
  US10/662,091
• Time in Patent Office: 949 Days
• Field of Search: 257/712, 257/777, 257/685, 257/686, 257/E31.131, 257/E23.051, 361/696, 361/697, 361/701, 361/702, 361/709, 361/711, 361/760, 298/880.45, 298/900.3, 298/900.32, 298/900.45, 298/952.12, 297/26, 297/265, 438/108, 438/109
• US Class Current: 257/712
• CPC Class Codes: H01L 2225/06527 Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
• CPC Class Codes: H01L 2225/06589 Thermal management, e.g. cooling
• CPC Class Codes: H01L 25/0652 the devices being arranged next and on each other, i.e. mixed assemblies
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: Y10T 29/49258 with thermal barrier or heat flow provision
• CPC Class Codes: Y10T 29/4935 Heat exchanger or boiler making
• CPC Class Codes: Y10T 29/49353 Heat pipe device making
• CPC Class Codes: Y10T 29/49377 Tube with heat transfer means
• CPC Class Codes: Y10T 29/49552 with prestressing of component by heat differential, e.g., shrink, fit
• CPC Class Codes: Y10T 29/53113 Heat exchanger
• CPC Class Codes: Y10T 29/53117 including means to manipulate heat exchanger tube bundle

Abstract

This invention relates to a high density architecture for an integrated circuit package (10) in which a plurality of circuit communication wafers (12) are disposed in a stack with a plurality of cooling plates (14) between them, and wherein circuit communication between the communication wafers (12) is provided from wafer to wafer through the cooling plates (14). In addition, the communication wafers (12) may have integrated circuit chips (18) deposited on both sides of the wafer, and chip-to-chip communication may be provided from one surface of the wafer to another through the wafer. The resulting integrated circuit package may have any desired geometrical shape and will permit heat exchange, power and data exchange to occur in three generally mutually orthogonal directions through the package.

Claims

1. An integrated circuit package comprising:

a plurality of circuitry wafers each comprising a substrate on which is carried one or more integrated circuits with at least one wafer configured for signal communication outside the package; and

a plurality of cooling plates alternately layered with the circuitry wafers;

wherein the circuitry wafers and cooling plates are layered in a first direction that defines a first axis of the package, and wherein signal communication between circuitry wafers within the package occurs in a direction along the first axis;

wherein the cooling plates are configured to direct heat flow in a path that is transverse to the first axis;

wherein at least one of power, data signal and control signal communication is supplied to the package from a direction that is transverse to both the first axis and the direction of heat flow; and

comprising cooling plates that define flow conduits therethrough for coolant fluid, wherein each flow conduit has two conduit ends and wherein the conduit ends are aligned at two different positions on the side of the package, and wherein the package further comprises manifolds that provide a port through which to provide coolant fluid to a plurality of flow conduits and a port to collect cooling fluid from a plurality of flow conduits, and wherein the manifolds are configured to permit access to the side of the package for providing at least one of power, data signal and control signal communication to circuitry wafers in the package.

3. The package of claim 1 or claim 2 wherein at least one cooling plate comprises a plate signal path therethrough and wherein a first IC on a circuitry wafer on one side of the cooling plate is positioned for signal communication through the plate signal path.

4. The package of claim 3 comprising a second IC on a circuitry wafer on the other side of the cooling plate, positioned for signal communication with the first IC through the plate signal path.

5. The package of claim 3 wherein the first IC is an optical IC and wherein the plate signal path comprises a plate optical signal path.

6. The package of claim 5 comprising a second optical IC on a circuitry wafer on the other side of the cooling plate, positioned for optical signal communication with the first optical IC through the plate optical signal path.

7. The package of claim 6 comprising a second IC on a substrate positioned for signal communication with the first IC via the substrate signal path.

8. The package of claim 1 or claim 2 wherein at least one circuitry wafer comprises a substrate having a substrate signal path therethrough and wherein a first IC is positioned on the substrate for signal communication therethrough.

9. The package of claim 8 wherein the first IC comprises an optical IC and wherein the substrate signal path comprises a subsume optical signal path.

10. The package of claim 9 comprising a second optical IC on a substrate positioned for optical signal communication with the first optical IC via the substrate optical signal path.

11. The package of claim 1 or claim 2, comprising non-electrically conductive substrates and cooling plates.

2. An integrated circuit package comprising:

a plurality of circuitry wafers each comprising a substrate on which is carried one or more integrated circuits with at least one circuitry wafer configured for signal communication outside the package; and

a plurality of cooling plates alternately layered with the circuitry wafers;

and comprising circuitry wafers and cooling plates configured so that integrated circuits on at least two circuitry wafers in the package communicate with each other through an intervening cooling plate; and

further comprising cooling plates that define flow conduits therethrough for coolant fluid, wherein each flow conduit has two conduit ends and wherein the conduit ends are aligned at two different sides of the package, and wherein the package further comprises manifolds that provide a port through which to provide coolant fluid to a plurality of flow conduits and a port to collect cooling fluid from a plurality of flow conduits.

12. The package of claim 2 wherein the manifolds are configured to permit access to the side of the package for providing power and/or control signals to circuitry wafers in the package.

13. The package of claim 2 or claim 12 wherein the circuitry wafers and cooling plates are layered in a first direction along a first axis, and wherein the circuitry wafers and cooling plates are configured to permit signal communication between circuitry wafers within the package in a direction along the first axis;

wherein the cooling plates are configured to direct heat flow in a path that is transverse to the first axis; and

wherein at least one of power, data signal communication and control signal communication are supplied to the package from a direction that is transverse to both the first axis and the direction of heat flow.

14. An integrated circuit package comprising:

a plurality of circuitry wafers each comprising a substrate on which is carried one or more integrated circuits with at least one circuitry wafer configured for signal communication outside the package; and

a plurality of cooling plates alternately layered with the circuitry wafers, including cooling plates that define flow conduits therethrough for coolant fluid, wherein each of the flow conduits has two conduit ends and wherein the conduit ends are aligned at two different sides of the package; and

wherein the package further comprises a first manifold that provides a port through which to provide coolant fluid to a plurality of flow conduits and a second manifold that provides a port to collect cooling fluid from the plurality of flow conduits.

15. The package of claim 14, comprising a manifold configured to permit access to the side of the package for providing at least one of power, data signal and control signal communication to circuitry wafers in the package.