Low-pass filter for a PLL, phase-locked loop and semiconductor integrated circuit

• US 7,030,688 B2
• Filed: 05/22/2003
• Issued: 04/18/2006
• Est. Priority Date: 05/22/2002
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Toyama, Masaomi, Umehara, Keijiro, Fukui, Masahiro, Yoshikawa, Takefumi, Iwata, Toru, Sakiyama, Shiro, Suzuki, Ryoichi, Dosho, Shiro, Yanagisawa, Naoshi
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US10/500,875
• Publication Number:
  US 20050077955A1
• Time in Patent Office: 1,062 Days
• Field of Search: 327156-158, 327552-559, 327/311, 327/337, 327147-148
• US Class Current: 327/558
• CPC Class Codes: H03L 7/0816 the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
• CPC Class Codes: H03L 7/0891 the up-down pulses controlling source and sink current generators, e.g. a charge pump
• CPC Class Codes: H03L 7/0893 the up-down pulses controlling at least two source current generators or at least two sink current generators connected to different points in the loop
• CPC Class Codes: H03L 7/0896 the current generators being controlled by differential up-down pulses
• CPC Class Codes: H03L 7/093 using special filtering or amplification characteristics in the loop H03L7/087 - H03L7/091 take precedence

Abstract

The invention provides a low-pass filter suitably used as a loop filter for a PLL or a DLL that has a filtering characteristic equivalent to that of a conventional one and can be realized in a smaller circuit area. The low-pass filter includes first filtering means (31) for accepting, as an input, an input signal to the low-pass filter and outputting a first voltage; a circuit element (311) included in the first filtering means (31) for allowing a first current to flow in accordance with the first voltage; current generating means (32) for generating a second current at a given rate to the first current; second filtering means (33) for accepting, as an input, the second current and outputting a second voltage; and adding means (34) for adding the first voltage and the second voltage and outputting an output signal of the low-pass filter, in which the second current is set to be smaller than the first current.

Claims

1. A low-pass filter comprising:

first filtering means that receives an input signal to said low-pass filter and outputs a first voltage;

a circuit element included in said first filtering means for generating a first current in accordance with said first voltage;

current generating means for generating a second current at a given rate to said first current;

second filtering means that receives said second current and outputs a second voltage; and

adding means for adding said first voltage and said second voltage and outputting an output signal of said low-pass filter,

wherein said given rate is a positive number smaller than 1.

2. The low-pass filter of claim 1,

wherein said current generating means is a current mirror circuit that has, on an input side thereof, a first semiconductor element with first conductance, and on an output side thereof, a second semiconductor element with second conductance at said given rate to said first conductance,

said current mirror circuit receives said first current and outputs said second current, and

said circuit element is said first semiconductor element.

3. The low-pass filter of claim 1,

wherein said circuit element is a resistive element with a resistance value corresponding to said first conductance instead,

said current generating means is a current mirror circuit that has, on an input side thereof, a first semiconductor element with first conductance, and on an output side thereof, a second semiconductor element with second conductance at said given rate to said first conductance, and

said current mirror circuit receives a third current corresponding to said first current and outputs said second current.

4. The low-pass filter of claim 1,

wherein said circuit element is a first voltage-current converter with first conductance for converting said first voltage into said first current, and

said current generating means is a second voltage-current converter with second conductance at said given rate to said first conductance for converting said first voltage into said second current.

5. The low-pass filter of claim 1,

wherein said adding means is an operational amplifier that has said second filtering means in a negative feedback portion thereof, accepts, as an input, said first voltage at a non-inverting input terminal thereof and outputs a third voltage as said output signal.

6. The low-pass filter of claim 1,

wherein said adding means is an operational transconductance amplifier that receives said first and second voltages and outputs a third current as said output signal.

7. The low-pass filter of claim 2, further comprising:

a first current source for supplying a first bias current; and

a second current source for supplying a second bias current,

wherein said first semiconductor element is a first transistor that provides said first conductance in accordance with said first bias current,

said second semiconductor element is a second transistor that provides said second conductance in accordance with said second bias current, and

said first and second current sources change the amplitudes of said first and second bias currents in accordance with a common bias control signal supplied from the outside, respectively.

8. The low-pass filter of claim 2,

wherein said current mirror circuit has, on an output side thereof, said second through nth (wherein n is a natural number of 3 or more) semiconductor elements and includes switches for respectively switching outputs of currents flowing through said second through nth semiconductor elements, and

said switches allow one of or a sum of a plurality of the currents respectively flowing through said second through nth semiconductor elements to be output as said second current.

9. The low-pass filter of claim 3, further comprising:

a first current source for supplying a first bias current; and

a second current source for supplying a second bias current,

wherein said first semiconductor element is a first transistor that provides said first conductance in accordance with said first bias current,

said second semiconductor element is a second transistor that provides said second conductance in accordance with said second bias current,

said first and second current sources change the amplitudes of said first and second bias currents in accordance with a common bias control signal supplied from the outside, respectively, and

said resistive element is a resistor ladder circuit that provides a resistance value corresponding to the reciprocal of said first conductance varying in accordance with said first bias current.

10. The low-pass filter of claim 4,

wherein said first and second conductance vary in accordance with a common bias control signal supplied from the outside.

11. The low-pass filter of claim 2, further comprising:

a current source for supplying a bias current; and

offset compensating means for adjusting said bias current in accordance with said output signal obtained with said first current cut off,

wherein at least one of said first and second semiconductor elements is a transistor that provides at least one of said first and second conductance in accordance with said bias current.

12. The low-pass filter of claim 11,

wherein said offset compensating means includes voltage holding means for holding a voltage of said output signal obtained with said first current cut off, and adjusts said bias current in accordance with said voltage held by said voltage holding means.

13. The low-pass filter of claim 11,

wherein said offset compensating means includes:

a comparator for comparing a voltage of said output signal obtained with said first current cut off with a reference voltage;

an updown counter for incrementing or decrementing a counter value thereof in accordance with an output of said comparator; and

a DA converter for converting said counter value into an analog value, and

said offset compensating means adjusts said bias current in accordance with an output of said DA converter.

14. The low-pass filter of claim 2,

wherein said second semiconductor element is a transistor that provides said second conductance in accordance with a supplied first bias current, and

said low-pass filter further comprises:

a replica circuit having an identical architecture to a portion including said second semiconductor element, said second filtering means and said adding means;

a first current source for supplying said first bias current;

a second current source for supplying a second bias current to a transistor included in said replica circuit correspondingly to said second semiconductor element; and

offset compensating means for adjusting said first and second bias current in accordance with an output of said replica circuit.

15. The low-pass filter of claim 14,

wherein said offset compensating means is an inverting amplifier.

16. The low-pass filter of claim 2, further comprising:

a first current source for supplying a first bias current;

a second current source for supplying a second bias current; and

bias adjusting means for adjusting said first and second bias currents in accordance with temperature change,

wherein said first semiconductor element is a first transistor that provides said first conductance in accordance with said first bias current, and

said second semiconductor element is a second transistor that provides said second conductance in accordance with said second bias current.

17. The low-pass filter of claim 16,

wherein said bias adjusting means includes:

a third transistor corresponding to said first transistor; and

a fourth transistor corresponding to said second transistor, and

said bias adjusting means adjusts bias currents with a given current difference respectively supplied to said third and fourth transistors, in such a manner that a given voltage difference is caused between said third and fourth transistors, and adjusts said first and second bias current in accordance with the adjustment of said bias current.

18. The low-pass filter of claim 16,

wherein said bias adjusting means is a temperature compensating circuit that changes said first and second bias currents in proportion to the temperature change.

19. The low-pass filter of claim 1,

wherein said circuit element includes a first switched capacitor circuit and a second switched capacitor circuit having one end connected to one end of said first switched capacitor circuit and the other end connected to said second filtering means, and generates said first current when said first and second switched capacitor circuits are in a first connection state, and

said current generating means corresponds to said second switched capacitor circuit, has a capacitance value at said given rate to a sum of capacitance values of said first and second switched capacitor circuits, and generates said second current when said first and second switched capacitor circuits are in a second connection state.

20. The low-pass filter of claim 19,

wherein said adding means includes a voltage follower circuit receiving said second voltage, and

said first filtering means outputs said first voltage in accordance with an output voltage of said voltage follower circuit.

21. The low-pass filter of claim 19,

wherein at least one of said first and second switched capacitor circuits is connected to a third switched capacitor circuit in parallel, and

when one of said first or second switched capacitor circuit and said third switched capacitor circuit connected in parallel is electrically connected to a first terminal, the other is electrically connected to a second terminal.

22. A low-pass filter for receiving a differential signal between first and second input signals and outputting a differential signal between first and second output signals, comprising:

two low-pass filters according to claim 1,

wherein one of said two low-pass filters receives said first input signal and outputs said first output signal, and

the other of said two low-pass filters receives said second input signal and outputs said second output signal.

23. The low-pass filter of claim 22,

wherein said current generating means is a current mirror circuit that has, on an input side thereof, a first semiconductor element with first conductance, and on an output side thereof, a second semiconductor element with second conductance at said given rate to said first conductance,

said current mirror circuit receives said first current and outputs said second current, and

said circuit element is said first semiconductor element.

24. The low-pass filter of claim 22,

wherein said circuit element is a first voltage-current converter with first conductance for converting said first voltage into said first current, and

said current generating means is a second voltage-current converter with second conductance at said given rate to said first conductance for converting said first voltage into said second current.

25. A feedback system for feeding back an output clock, generated in accordance with on an input clock, to make said output clock attain a desired characteristic, comprising:

a charge pump circuit for generating first and second charge currents in accordance with a phase difference between said input clock and a clock resulting from the feedback;

a loop filter having the low-pass filter according to claim 22, said loop filter filtering a differential signal between said first and second charge currents and outputting first and second output signals; and

output clock generating means for generating said output clock in accordance with a differential signal between said first and second output signals.

26. A semiconductor integrated circuit comprising the low-pass filter according to claim 1.

27. A feedback system for feeding back an output clock, generated in accordance with an input clock, to make said output clock attain a desired characteristic, comprising:

a charge pump circuit for generating a charge current in accordance with a phase difference between said input clock and a clock resulting from the feedback;

a loop filter for filtering said charge current; and

output clock generating means for generating said output clock in accordance with an output signal from said loop filter,

wherein said loop filter includes;

first filtering means for filtering said charge current and outputting a first voltage;

a circuit element included in said first filtering means for generating a first current in accordance with said first voltage;

current generating means for generating a second current at a given rate to said first current;

second filtering means for filtering said second current and outputting a second voltage; and

adding means for adding said first voltage and said second voltage and outputting said output signal, and

said given rate is a positive number smaller than 1.

28. The feedback system of claim 27,

wherein said output clock generating means is a voltage controlled oscillator that oscillates said output clock and changes an oscillation frequency in accordance with said output signal from said loop filter.

29. The feedback system of claim 27,

wherein said output clock generating means is a voltage controlled delay circuit that changes a delay of said output clock from said input clock in accordance with said input clock and said output signal from said loop filter.

30. The feedback system of claim 27, further comprising:

a stationary phase error canceling circuit including a charge pump circuit for generating a third current in accordance with a phase difference between said input clock and said clock resulting from the feedback, charge storing means for storing charge provide by said third current, and a voltage controlled current source for generating a fourth current in accordance with a voltage generated in said charge storing means,

wherein said loop filter includes;

a first current source for supplying a first bias current; and

a second current source for supplying a second bias current,

said current generating means is a current mirror circuit that has, on an input side thereof, a first field effect transistor for providing first conductance in accordance with said first bias current, and on an output side thereof, a second field effect transistor for providing second conductance at said given rate to said first conductance in accordance with said second bias current,

said current mirror circuit receives said first current on the input side thereof and said foruth current on one of the input and output sides thereof, and outputs said second current, and

said circuit element is said first field effect transistor.

31. The feedback system of claim 27,

wherein said circuit element is capable of changing conductance thereof, and

said feedback system further comprises bias controlling means for controlling said conductance of said circuit element and said charge current by a common bias control signal.

32. The feedback system of claim 31,

wherein said loop filter includes:

a first current source for supplying a first bias current; and

a second current source for supplying a second bias current,

said current generating means is a current mirror circuit that has, on an input side thereof, a first field effect transistor for providing first conductance in accordance with said first bias current, and on an output side thereof, a second field effect transistor for providing second conductance at said given rate to said first conductance in accordance with said second bias current,

said current mirror circuit receives said first current and outputs said second current,

said circuit element is said first field effect transistor, and

said first and second current sources change said first and second bias current in accordance with said common bias control signal, respectively.

33. The feedback system of claim 31,

wherein said circuit element is a first voltage-current converter with first conductance for converting said first voltage into said first current,

said current generating means is a second voltage-current converter with second conductance at said given rate to said first conductance for converting said first voltage into said second current, and

said first and second voltage-current converters change said first and second conductance in accordance with said common bias control signal, respectively.

34. The feedback system of claim 31,

wherein said bias control signal is generated in accordance with said output signal from said loop filter.

35. The feedback system of claim 31,

wherein said adding means is an operational amplifier, and

said bias controlling means controls a band characteristic of said operational amplifier by said bias control signal.

36. The feedback system of claim 34, further comprising:

startup means for switching said output signal from said loop filter between a first state where said output signal is set to an output from said adding means and a second state where said output signal is set to a given voltage,

wherein said startup means sets said second state at the startup of said feedback system.

37. The feedback system of claim 36,

wherein said adding means is an operational amplifier that has said second filtering means in a negative feedback portion thereof, receives said first voltage at a non-inverting input terminal thereof and outputs a third voltage as said output signal,

said startup means has a switch for switching a connecting state of input terminals of said operational amplifier between short-circuit and disconnection, and

said switch disconnects said input terminals in said first state and short-circuits said input terminals in said second state.

38. The feedback system of claim 36,

wherein said startup means has a switch for switching a power source for said given voltage between an internal power source and an external power source.

39. A semiconductor integrated circuit comprising the feedback system according to claim 27.

40. The semiconductor integrated circuit of claim 39 used in an IC card.

41. The semiconductor integrated circuit of claim 39,

wherein said semiconductor integrated circuit has a chip-on-chip structure, and

said feedback system is included in an upper portion of said chip-on-chip structure.

42. The semiconductor integrated circuit of claim 39,

wherein said feedback system is provided on a pad region of said semiconductor integrated circuit.

43. The semiconductor integrated circuit of claim 39,

wherein said semiconductor integrated circuit is a microprocessor.