Self-calibratable oscillating device and method and ASIC thereof

• US 7,030,706 B2
• Filed: 12/05/2003
• Issued: 04/18/2006
• Est. Priority Date: 12/05/2003
• Status: Active Grant

• Current Assignee: Elite Semiconductor Memory Technology Inc.
• Original Assignee: Elite Semiconductor Memory Technology Inc.
• Inventors: Yao, Chung Ting
• Primary Examiner(s): Chang, Joseph
• Application Number:
  US10/728,382
• Publication Number:
  US 20050122182A1
• Time in Patent Office: 865 Days
• Field of Search: 331/44, 331/66, 331/176, 331/160
• US Class Current: 331/44
• CPC Class Codes: H03L 1/025 and a memory for digitally storing correction values
• CPC Class Codes: H03L 1/026 by using a memory for digitally storing correction values H03L1/025 takes precedence

Abstract

The present self-calibratable oscillating device includes a phase comparator, a clock pad electrically connected to a first input port of the phase comparator, a crystal oscillator electrically connected to a second input port of the phase comparator, an analog/digital converter electrically connected to an output port of the phase comparator, and a memory electrically connected to an output port of the analog/digital converter. The crystal oscillator can be a temperature-compensated crystal oscillator or a surface acoustic wave crystal oscillator. The present self-calibratable oscillating device can further includes a first switch positioned between the first input port of the phase comparator and the clock pad, a second switch positioned between the crystal oscillator and the clock pad wherein the stream direction of the first switch is in reverse of that of the second switch, and a logic control device for controlling the first switch and the second switch.

Claims

1. A self-calibratable oscillating device comprising:

a phase comparator including a first input port, a second input port and an output port;

a clock pad electrically connected to said first input port;

a crystal oscillator electrically connected to said second input port;

an analog/digital converter electrically connected to said output port of said phase comparator, said analog/digital converter having an output end;

a memory electrically connected to said output end of said analog/digital converter;

a first switch positioned between said first input port of said phase comparator and said clock pad;

a second switch positioned between said crystal oscillator and said clock pad, wherein a stream direction of said second switch is in reverse to a stream direction of said first switch; and

a logic control device for controlling said first switch and said second switch.

2. The self-calibratable oscillating device of claim 1, further comprising:

a power pad; and

a high voltage detector electrically connected to said power pad and said logic control device.

3. The self-calibratable oscillating device of claim 1, further comprising:

an embedded clock generator suitable for providing an operation clock for said logic control device.

4. The self-calibratable oscillating device of claim 3, wherein said embedded clock generator is a resistance-capacitor oscillator.

5. An ASIC for a crystal oscillator comprising:

a system bus;

an embedded CPU electrically connected to said system bus;

a system memory electrically connected to said system bus;

a clock pad suitable for receiving a reference clock;

a phase comparing means for generating a phase difference signal between said reference clock and a clock of an oscillating device of the crystal oscillator;

an analog/digital converting means for converting the phase difference signal into a digital signal;

a first switch positioned between said phase comparing means and said clock pad; and

a second switch positioned between the oscillating device and said clock pad.

6. The ASIC for a crystal oscillator of claim 5, further comprising:

a registering means electrically connected to said system bus, said registering means for storing data of said system memory when said second switch is turned on.