Apparatus and methods for calibrating signal-processing circuitry

• US 7,031,683 B2
• Filed: 02/26/2002
• Issued: 04/18/2006
• Est. Priority Date: 01/12/2001
• Status: Active Grant

• Current Assignee: Silicon Laboratories Incorporated
• Original Assignee: Silicon Laboratories Incorporated
• Inventors: Scott, Jeffrey W., Tuttle, G. Tyson, Behrens, Richard T., Vishakhadatta, G. Diwakar, Croman, Russell, Kerth, Donald A., Srinivasan, Vishnu S.
• Primary Examiner(s): Corsaro, Nick
• Assistant Examiner(s): TRAN, TUAN A
• Application Number:
  US10/083,633
• Publication Number:
  US 20020168952A1
• Time in Patent Office: 1,512 Days
• Field of Search: 455423-425, 455/63.1, 455/67.11, 455/13, 455/67.16, 455/68, 455/226.1, 455/259, 455/262, 455/334, 455/340, 4551971- 3, 455/194.2, 455/195.1, 455254-256, 455/323, 455/333, 455/198.1, 455/118, 375224-228, 341120-121, 327538-543, 323315-316
• US Class Current: 455/197.2
• CPC Class Codes: H04B 1/0003 Software-defined radio [SDR] systems, i.e. systems wherein components typically implemented in hardware, e.g. filters or modulators/demodulators, are implented using software, e.g. by involving an AD or DA conversion stage such that at least part of the signal processing is performed in the digital domain digital baseband systems H04L25/00; digital modulation/demodulation H04L27/00; CDMA H04B1/707; TDMA H04B7/2643; image transmission H04N5/00
• CPC Class Codes: H04B 1/28 the receiver comprising at least one semiconductor device having three or more electrodes
• CPC Class Codes: H04B 1/406 with more than one transmission mode, e.g. analog and digital modes
• CPC Class Codes: H04B 15/02 Reducing interference from electric apparatus by means located at or near the interfering apparatus
• CPC Class Codes: H04B 15/04 the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
• CPC Class Codes: H04B 2215/064 Reduction of clock or synthesizer reference frequency harmonics

Abstract

A calibration circuitry includes an adjustable capacitor, a voltage generator, a reference voltage generator, and a controller. The reference voltage generator provides a reference voltage. The voltage generator provides a measurement voltage that depends on the capacitance of the adjustable capacitor. The capacitance of the adjustable capacitor varies in response to a control signal. The controller provides the control signal based on the relative values of the reference voltage and the measurement voltage.

Claims

1. A calibration circuitry, comprising:

an adjustable capacitor, the adjustable capacitor having a capacitance that varies in response to a plurality of control signals;

a voltage generator, the voltage generator configured to provide a measurement voltage that depends on the capacitance of the adjustable capacitor;

a reference voltage generator, the reference voltage generator configured to provide a reference voltage; and

a controller, the controller configured to provide the plurality of control signals based on the relative values of the reference voltage and the measurement voltage, wherein the adjustable capacitor is calibrated by holding the plurality of control signals constant after powering up the calibration circuitry.

2. The calibration circuitry according to claim 1, wherein the adjustable capacitor is charged in response to a first clock signal.

3. The calibration circuitry according to claim 2, wherein the adjustable capacitor is discharged in response to a second clock signal.

4. The calibration circuitry according to claim 3, wherein the first and second clock signals are non-overlapping.

5. The calibration circuitry according to claim 4, wherein the controller comprises a logic circuitry.

6. The calibration circuitry according to claim 5, wherein the logic circuitry comprises a finite-state machine configured to provide the plurality of control signals.

7. The calibration circuitry according to claim 6, wherein the finite-state machine uses successive approximation to provide the plurality of control signals.

8. A radio-frequency (RF) apparatus, comprising:

a first integrated circuit, including;

an adjustable capacitor having a capacitance value adapted to be adjustable in response to a plurality of control signals;

a voltage generator configured to generate a measurement voltage that depends in part on the capacitance value of the adjustable capacitor; and

a controller configured to receive the measurement voltage and a reference voltage, the controller further configured to provide the plurality of control signals based on the relative values of the measurement voltage and the reference voltage, wherein the adjustable capacitor is calibrated by holding the plurality of control signals constant.

9. The radio-frequency apparatus according to claim 8, wherein the first integrated circuit further comprises radio-frequency receiver circuitry coupled to an analog-to-digital converter circuitry.

10. The radio-frequency apparatus according to claim 9, wherein the adjustable capacitor is calibrated after powering up the first integrated circuit.

11. The radio-frequency apparatus according to claim 10, wherein the adjustable capacitor is calibrated before a reception of a burst by the radio-frequency receiver circuitry.

12. The radio-frequency apparatus according to claim 11, further comprising a second integrated circuit coupled to the first integrated circuit, the second integrated circuit comprising digital signal processing circuitry configured to accept a digital output signal of the analog-to-digital converter circuitry.

13. The radio-frequency apparatus according to claim 8, wherein the adjustable capacitor comprises a plurality of switchable capacitors configured to adjust the capacitance value of the adjustable capacitor in response to the plurality of control signals, and wherein the plurality of switchable capacitors are coupled in parallel with one another.

14. The radio-frequency apparatus according to claim 13, wherein each switchable capacitor in the plurality of switchable capacitors comprises a capacitor coupled to a switch.

15. The radio-frequency apparatus according to claim 14, wherein each switch in the plurality of switchable capacitors responds to a respective signal in the plurality of control signals.

16. The radio-frequency apparatus according to claim 15, wherein the adjustable capacitor is charged in response to a first clock signal and discharged in response to a second clock signal, and wherein the first and second clock signals are non-overlapping.

17. The radio-frequency apparatus according to claim 16, wherein the adjustable capacitor further comprises a fixed capacitor coupled in parallel with the plurality of switchable capacitors.

18. The radio-frequency apparatus according to claim 17, wherein the controller comprises a finite-state machine configured to generate the plurality of control signals.

19. The radio-frequency apparatus according to claim 18, wherein the finite-state machine uses successive approximation to generate the plurality of control signals.

20. The radio-frequency apparatus according to claim 8, wherein the first integrated circuit further comprises radio-frequency receiver circuitry coupled to the analog-to-digital converter circuitry, the radio-frequency receiver circuitry comprising a cascade coupling of a low-noise amplifier and a mixer.

21. The radio-frequency apparatus according to claim 20, wherein the adjustable capacitor is calibrated after powering up the radio-frequency circuitry within the first integrated circuit.

22. The radio-frequency apparatus according to claim 21, wherein the adjustable capacitor is calibrated before a reception of a burst by the radio-frequency receiver circuitry.

23. The radio-frequency apparatus according to claim 22, further comprising a second integrated circuit coupled to the first integrated circuit, the second integrated circuit comprising digital signal processing circuitry configured to accept a digital output signal of the analog-to-digital converter circuitry.

24. A method of calibrating circuitry within a first integrated circuit, comprising:

adjusting a capacitance value of an adjustable capacitor included within the first integrated circuit, the capacitance value of the adjustable capacitor configured to be adjustable in response to a plurality of control signals;

generating a measurement voltage, a voltage value of the measurement voltage being dependent in part on the capacitance value of the adjustable capacitor;

supplying to the adjustable capacitor the plurality of control signals generated by a controller, the controller configured to receive the measurement voltage and a reference voltage and to provide the plurality of control signals based on the relative values of the measurement voltage and the reference voltage; and

calibrating the adjustable capacitor by holding constant the plurality of control signals.

25. The method according to claim 24, wherein adjusting the capacitance value of the adjustable capacitor comprises using a plurality of switchable capacitors configured to adjust the capacitance value of the adjustable capacitor in response to the plurality of control signals;

and wherein the plurality of switchable capacitors are coupled in parallel with one another, and wherein each switchable capacitor in the plurality of switchable capacitors comprises a capacitor coupled to a switch, and wherein each switch is configured to respond to a respective signal in the plurality of control signals.

26. The method according to claim 25, wherein generating the measurement voltage further comprises:

charging the adjustable capacitor in response to a first clock signal; and

discharging the adjustable capacitor in response to a second clock signal,

wherein the first and second clock signals are non-overlapping.

27. The method according to claim 26, wherein the adjustable capacitor further comprises a fixed capacitor coupled in parallel with the plurality of switchable capacitors.

28. The method according to claim 27, further comprising providing within the controller a finite-state machine configured to generate the plurality of control signals by using successive approximation.

29. The method according to claim 28, further comprising receiving radio-frequency signals by using a radio-frequency receiver circuitry, the radio-frequency circuitry included in the first integrated circuit and coupled to an analog-to-digital converter circuitry.

30. The method according to claim 29, further comprising calibrating the adjustable capacitor after powering up the first integrated circuit.

31. The method according to claim 30, further comprising calibrating the adjustable capacitor before a reception of a burst by the radio-frequency receiver circuitry.

32. The method according to claim 31, further comprising providing a second integrated circuit coupled to the first integrated circuit, the second integrated circuit comprising digital signal processing circuitry configured to accept a digital output signal of the analog-to-digital converter circuitry.