Erase count differential table within a non-volatile memory system

• US 7,032,087 B1
• Filed: 10/28/2003
• Issued: 04/18/2006
• Est. Priority Date: 10/28/2003
• Status: Active Grant

• Current Assignee: SanDisk Technologies LLC (Western Digital Corporation)
• Original Assignee: SanDisk Corporation (Western Digital Corporation)
• Inventors: Qawami, Bahman, Sabet-Sharghi, Farshid, Chang, Robert C.
• Primary Examiner(s): Ellis, Kevin L.
• Application Number:
  US10/696,228
• Time in Patent Office: 903 Days
• Field of Search: 711/103, 711/156, 365/218
• US Class Current: 711/156
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 2212/1036 Life time enhancement
• CPC Class Codes: G06F 2212/7211 Wear leveling
• CPC Class Codes: G11C 16/349 Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles

Abstract

Methods and apparatus for efficiently tracking the usage of physical blocks of non-volatile memory are disclosed. According to one aspect of the present invention, a method for maintaining a data structure that stores contents relating to the usage of physical blocks includes determining when to update the contents stored in the data structure, and obtaining a first differential erase count from the data structure when the contents are to be updated. The first differential erase count provides information on a number of times a first physical block has been erased. The method also includes determining a first actual erase count when the contents are to be updated. The first actual erase count is associated with a second physical block, and provides a number of times the second physical block has been erased. Finally, the method includes updating the first differential erase count when the contents are to be updated.

Claims

1. A method for maintaining a data structure associated with a non-volatile memory system, the data structure being arranged to store contents relating to usage of a plurality of physical blocks included in the non-volatile memory system, the method comprising:

determining when it is appropriate to update the contents stored in the data structure;

obtaining at least a first differential erase count from the data structure when it is determined that it is appropriate to update the contents stored in the data structure, the first differential erase count being a plurality of bits arranged to provide information relating to a number of times a first physical block of the plurality of physical blocks has been erased;

determining a first actual erase count when it is determined that it is appropriate to update the contents stored in the data structure, the first actual erase count being associated with a second physical block of the plurality of physical blocks, wherein the first actual erase count is a plurality of bits arranged to provide a number of times the second physical block has been erased; and

updating the first differential erase count when it is determined that it is appropriate to update the contents stored in the data structure, wherein updating the first differential erase count includes using the first actual erase count.

2. The method of claim 1 further including:

identifying a first stored actual erase count associated with the non-volatile memory system when it is determined that it is appropriate to update the contents stored in the data structure, wherein updating the first differential erase count when it is determined that it is appropriate to update the contents stored in the data structure includes processing the first differential erase count, the first actual erase count, and the first stored actual erase count to create the updated first differential erase count.

3. The method of claim 2 wherein the first stored actual erase count is a stored lowest actual erase count, the stored lowest actual erase count being a previous lowest actual erase count associated with the plurality of physical blocks.

4. The method of claim 2 wherein the first actual erase count is a current lowest actual erase count associated with the plurality of physical blocks.

5. The method of claim 1 wherein determining when it is appropriate to update the contents stored in the data structure includes obtaining a first value and a comparison value, comparing the first value and the comparison value to determine if the first value is substantially equal to the comparison value, and updating the contents stored in the data structure when it is determined that the first value is substantially equal to the comparison value.

6. The method of claim 5 wherein the first value is an average erase count associated with the plurality of blocks.

7. The method of claim 1 further including:

storing the updated first differential erase count in the data structure; and

storing the first actual erase count in the non-volatile memory system.

12. The memory system of claim 1 wherein the means for determining when it is appropriate to update the contents stored in the data structure include means for obtaining a first value and a comparison value, means for comparing the first value and the comparison value to determine if the first value is substantially equal to the comparison value, and means for updating the contents stored in the data structure when it is determined that the first value is substantially equal to the comparison value.

13. The memory system of claim 12 wherein the first value is an average erase count associated with the plurality of blocks.

8. A memory system comprising:

a non-volatile memory, the non-volatile memory including a plurality of physical blocks and a data structure, the data structure being arranged to store contents relating to usage of the plurality of physical blocks;

means for determining when it is appropriate to update the contents stored in the data structure;

means for obtaining at least a first differential erase count from the data structure when it is determined that it is appropriate to update the contents stored in the data structure, the first differential erase count being a plurality of bits arranged to provide information relating to a number of times a first physical block of the plurality of physical blocks has been erased;

means for determining a first actual erase count when it is determined that it is appropriate to update the contents stored in the data structure, the first actual erase count being associated with a second physical block of the plurality of physical blocks, wherein the first actual erase count is a plurality of bits arranged to provide a number of times the second physical block has been erased; and

means for updating the first differential erase count when it is determined that it is appropriate to update the contents stored in the data structure, wherein the means for updating the first differential erase count include means for using the first actual erase count.

9. The memory system of claim 8 further including:

means for identifying a first stored actual erase count associated with the memory system when it is determined that it is appropriate to update the contents stored in the data structure, wherein the means for updating the first differential erase count when it is determined that it is appropriate to update the contents stored in the data structure include means for processing the first differential erase count, the first actual erase count, and the first stored actual erase count to create the updated first differential erase count.

10. The memory system of claim 9 wherein the first stored actual erase count is a stored lowest actual erase count, the stored lowest actual erase count being a previous lowest actual erase count associated with the plurality of physical blocks.

11. The memory system of claim 9 wherein the first actual erase count is a current lowest actual erase count associated with the plurality of physical blocks.

14. The memory system of claim 8 further including:

means for storing the updated first differential erase count in the data structure; and

means for storing the first actual erase count in the memory system.

15. The memory system of claim 8 wherein the memory system is one of an embedded system, a Smart Media card, a Compact Flash card, a Secure Digital Card, and a MultiMedia card.

16. A memory system comprising:

a non-volatile memory, the non-volatile memory including a plurality of physical blocks and a data structure, the data structure being arranged to store contents relating to usage of the plurality of physical blocks;

code devices that cause a determination of when it is appropriate to update the contents stored in the data structure;

code devices that cause at least a first differential erase count to be obtained from the data structure when it is determined that it is appropriate to update the contents stored in the data structure, the first differential erase count being a plurality of bits arranged to provide information relating to a number of times a first physical block of the plurality of physical blocks has been erased;

code devices that cause a determination of a first actual erase count when it is determined that it is appropriate to update the contents stored in the data structure, the first actual erase count being associated with a second physical block of the plurality of physical blocks, wherein the first actual erase count is a plurality of bits arranged to provide a number of times the second physical block has been erased;

code devices that cause the first differential erase count to be updated when it is determined that it is appropriate to update the contents stored in the data structure, wherein the means for updating the first differential erase count include means for using the first actual erase count; and

a computer readable medium that stores the code devices.

17. The memory system of claim 16 further including:

code devices that cause a first stored actual erase count associated with the memory system to be identified when it is determined that it is appropriate to update the contents stored in the data structure, wherein the code devices that cause the first differential erase count to be updated when it is determined that it is appropriate to update the contents stored in the data structure include code devices that cause the first differential erase count, the first actual erase count, and the first stored actual erase count to be processed to create the updated first differential erase count.

18. The memory system of claim 17 wherein the first stored actual erase count is a stored lowest actual erase count, the stored lowest actual erase count being a previous lowest actual erase count associated with the plurality of physical blocks.

19. The memory system of claim 17 wherein the first actual erase count is a current lowest actual erase count associated with the plurality of physical blocks.

20. The memory system of claim 16 wherein the code devices that cause the determination of when it is appropriate to update the contents stored in the data structure include code devices that cause a first value and a comparison value to be obtained, code devices that cause the first value and the comparison value to be compared determine if the first value is substantially equal to the comparison value, and code devices that cause the contents stored in the data structure to be updated when it is determined that the first value is substantially equal to the comparison value.

21. The memory system of claim 20 wherein the first value is an average erase count associated with the plurality of blocks.

22. The memory system of claim 16 further including:

code devices that cause the updated first differential erase count to be stored in the data structure; and

code devices that cause the first actual erase count to be stored in the memory system.

23. The memory system of claim 16 wherein the memory system is one of an embedded system, a Smart Media card, a Compact Flash card, a Secure Digital Card, and a MultiMedia card.

24. A method for tracking the life remaining for a first physical block, the first physical block being one of a plurality of physical blocks included in a non-volatile memory system, the method comprising:

obtaining a differential erase count associated with the first physical block, the differential erase count being arranged to substantially express a difference between a number of times the first physical block has been erased and a first value;

incrementing the differential erase count; and

storing the differential erase count.

25. The method of claim 24 wherein obtaining the differential erase count includes obtaining the differential erase count from a differential erase count block of the non-volatile memory system, and storing the differential erase count includes storing the differential erase count in at least one of the differential erase count block and the first physical block.

26. The method of claim 24 further including:

obtaining an average erase count associated with the non-volatile memory system, the average erase count being arranged to indicate an average number of times the plurality of physical blocks has been erased; and

comparing the average erase count with a second value to determine when the average erase count is substantially equal to the second value, wherein when it is determined that the average erase count is substantially equal to the second value, the method still further includes updating the differential erase count after the differential erase count is obtained.

27. The method of claim 26 wherein updating the differential erase count includes:

identifying a third value; and

modifying the differential erase count to substantially express the difference between the number of times the first physical block has been erased and the third value before storing the differential erase count.

28. The method of claim 27 wherein the first value is a previous lowest actual erase count associated with the non-volatile memory system, the previous lowest actual erase count being arranged to indicate a previous fewest number of times one of the plurality of physical blocks has been erased, and wherein the third value is a current lowest actual erase count associated with the non-volatile memory system, the current lowest actual erase count being arranged to indicate a current fewest number of times one of the plurality of physical blocks has been erased.

29. A system comprising:

a non-volatile memory, the non-volatile memory including a plurality of physical blocks, the plurality of physical blocks including a first physical block;

code devices for obtaining a differential erase count associated with the first physical block, the differential erase count being arranged to substantially express a difference between a number of times the first physical block has been erased and a first value;

code devices for incrementing the differential erase count;

code devices for storing the differential erase count; and

a medium that stores the code devices.

30. The system of claim 29 wherein the code devices for obtaining the differential erase count include code devices for obtaining the differential erase count from a differential erase count block of the non-volatile memory system, and code devices for storing the differential erase count includes storing the differential erase count in at least one of the differential erase count block and the first physical block.

31. The system of claim 29 further including:

code devices for obtaining an average erase count associated with the non-volatile memory system, the average erase count being arranged to indicate an average number of times the plurality of physical blocks has been erased; and

code devices for comparing the average erase count with a second value to determine when the average erase count is substantially equal to the second value, wherein when it is determined that the average erase count is substantially equal to the second value, the system includes code devices for updating the differential erase count after the differential erase count is obtained.

32. The system of claim 31 wherein the code devices for updating the differential erase count include:

code devices for identifying a third value; and

code devices for modifying the differential erase count to substantially express the difference between the number of times the first physical block has been erased and the third value before storing the differential erase count.

33. The system of claim 32 wherein the first value is a previous lowest actual erase count associated with the non-volatile memory system, the previous lowest actual erase count being arranged to indicate a previous fewest number of times one of the plurality of physical blocks has been erased, and wherein the third value is a current lowest actual erase count associated with the non-volatile memory system, the current lowest actual erase count being arranged to indicate a current fewest number of times one of the plurality of physical blocks has been erased.

34. The system of claim 29 wherein the system is one of an embedded system, a Smart Media card, a Compact Flash card, a Secure Digital Card, and a MultiMedia card.