Efficient design to calculate extrinsic information for soft-in-soft-out (SISO) decoder

• US 7,032,164 B2
• Filed: 10/04/2002
• Issued: 04/18/2006
• Est. Priority Date: 05/31/2002
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Tran, Hau Thien, Cameron, Kelly Brian
• Primary Examiner(s): Lamarre, Guy J.
• Application Number:
  US10/264,766
• Publication Number:
  US 20030226095A1
• Time in Patent Office: 1,292 Days
• Field of Search: 714/755, 714/701, 714/786, 714/792, 714794-796, 375/262, 375/265, 375/261, 375/341, 375/279
• US Class Current: 714/792
• CPC Class Codes: H03M 13/256 with trellis coding, e.g. with convolutional codes and TCM
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2767 Interleaver wherein the permutation pattern or a portion thereof is stored
• CPC Class Codes: H03M 13/2771 Internal interleaver for turbo codes H03M13/2714 and H03M13/2725 take precedence
• CPC Class Codes: H03M 13/2785 Interleaver using in-place interleaving, i.e. writing to and reading from the memory is performed at the same memory location
• CPC Class Codes: H03M 13/2957 Turbo codes and decoding
• CPC Class Codes: H03M 13/4123 implementing the return to a predetermined state
• CPC Class Codes: H03M 13/4161 implementing path management
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 1/0066 Parallel concatenated codes
• CPC Class Codes: H04L 1/0068 by puncturing
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27

Abstract

Efficient design to calculate extrinsic information for Soft-In-Soft-Out (SISO) decoder. A design provides for very efficient performing extrinsic value calculation when performing iterative decoding. The design also accommodates a variety of rate controls each having varying bandwidth efficiencies. By grouping and capitalizing on the commonality of many of the intermediate terms that are employed when calculating the extrinsic values needed to perform iterative decoding, a great saving in terms of hardware may be achieved. In addition, this also provides a great deal of improvement in terms of operational speed and overall decoder system efficiency. The design is also adaptable to assist in performing decoding input symbols having multiple bits; a single design may be employed to accommodate different input symbols that have different numbers of bits. The extrinsic calculation employs min* processing in one embodiment; however, the design may also be performed using max*, min, or max processing.

Claims

1. A soft-in soft-out functional block (SISO), within a turbo trellis coded modulation (TTCM) decoder, that calculates extrinsic information when iteratively decoding a plurality of symbols of a received data frame, the plurality of symbols being encoded according to a rate control sequence, the SISO comprising:

an extrinsic calculation functional block that determines a plurality of minimum extrinsic outputs and a plurality of log extrinsic outputs according to the rate control sequence, the extrinsic functional block employs a plurality of trellis metrics, a plurality of forward metric values (alphas) and a plurality of backward metric values (betas) corresponding to a trellis, and a plurality of ‘

a priori’

probability values (apps);

an extrinsic decoding functional block that determines extrinsic information corresponding to input bits of symbols of the plurality of symbols using the plurality of minimum extrinsic outputs and the plurality of log extrinsic outputs, the decoding functional block also decodes the input bits using the extrinsic information corresponding to the input bits and the apps corresponding to the input bits; and

an uncoded bit selection determination functional block that determines an uncoded bit select value that is used to selectively decode an uncoded bit when at least one symbol of the plurality of symbols comprises the uncoded bit; and

wherein the uncoded bit selection determination functional block uses the decoded input bits to select a best estimate of the uncoded bit.

2. The SISO of claim 1, wherein the extrinsic functional block employs at least one of mm processing, max processing, and/or max* processing to determine the plurality of minimum extrinsic outputs and the plurality of log extrinsic outputs according to the rate control sequence.

3. The SISO of claim 1, wherein the extrinsic calculation functional block employs min* processing to determine the plurality of minimum extrinsic outputs and the plurality of log extrinsic outputs according to the rate control sequence.

4. The SISO of claim 3, wherein the min* processing employs a constant offset that ensures a positively valued output from the min* processing.

5. The SISO of claim 1, wherein the extrinsic calculation functional block employs a flag to represent at least two trellis metrics within the plurality of trellis metrics.

6. The SISO of claim 1, wherein at least two trellis metrics within the plurality of trellis metrics have a common received metric value, the received metric value corresponding to a symbol within the plurality of symbols within the received data frame.

7. The SISO of claim 1, wherein SISO performs processing on a clock cycle basis;

the extrinsic calculation functional block determines the extrinsic information on the clock cycle basis; and

the extrinsic decoding functional block decodes the input bits on the clock cycle basis.

8. The SISO of claim 1, wherein the extrinsic calculation functional block comprises an extrinsic app functional block that selectively adds the plurality of ‘

a prior’

probability values (apps) with the plurality of trellis metrics according to the trellis.

9. The SISO of claim 1, wherein the extrinsic calculation functional block initially performs min* processing on the plurality of forward metric values (alphas) and the plurality of trellis metrics thereby generating a plurality of intermediate min* outputs;

and

the extrinsic calculation functional block subsequently performs min* processing on the plurality of intermediate min* outputs and the plurality of backward metric values (betas).

10. The SISO of claim 9, wherein the plurality of forward metric values (alphas) and the plurality of trellis metrics are selectively combined for the min* processing according to the trellis.

11. The SISO of claim 1, wherein the extrinsic calculation functional block comprises a plurality of extrinsic min* trees, each extrinsic min* tree being operable to calculate a probability of a bit of an input symbol, of the plurality of symbols of the received data frame, comprising a value of a 1 or a 0.

12. The SISO of claim 11, further comprising a metric and ‘

a priori’

probability combination functional block that selectively sums the plurality of trellis metrics and the plurality of ‘

a priori’

probability values (apps) according to the rate control sequence; and

wherein the plurality of extrinsic min* trees initially performs min* processing that includes the plurality of forward metric values (alphas) and the sums of the plurality of trellis metrics and the plurality of ‘

a priori’

probability values (apps); and

the plurality of extrinsic min* trees subsequently performs min* processing that includes the plurality of backward metric values (betas).

13. The SISO of claim 1, wherein at least one symbol of the plurality of symbols of the received data frame comprises two bits;

the extrinsic decoding functional block simultaneously determines extrinsic information for the two bits.

14. The SISO of claim 13, wherein the extrinsic decoding functional block comprises a normalize functional block and a saturate functional block that operate together to normalize the extrinsic information for the two bits thereby reducing the extrinsic information by a factor of two.

15. The SISO of claim 14, wherein the extrinsic information for the two bits comprises four values;

and

the normalized extrinsic information for the two bits comprises two values.

16. The SISO of claim 1, wherein the plurality of symbols of the received data frame are encoded using a systematic encoder.

17. The SISO of claim 1, wherein the plurality of symbols of the received data frame are encoded using a non-systematic encoder.

18. The SISO of claim 1, wherein the uncoded bit selection determination functional block employs min* processing to generate the uncoded bit select value;

and

the uncoded bit select value is used to select the best estimate of the uncoded bit from among a plurality of possible uncoded bit values.

19. The SISO of claim 18, wherein the uncoded bit select value and at least one of the decoded input bits are used to select the best estimate of the uncoded bit from among the plurality of possible uncoded bit values.

20. The SISO of claim 1, wherein the plurality of symbols being encoded using a systematic TTCM encoder.

21. The SISO of claim 1, wherein the plurality of symbols being encoded using a non-systematic TTCM encoder.

22. The SISO of claim 1, wherein the TTCM decoder is contained within at least one of a satellite receiver, a high definition television (HDTV) set top box receiver, a mobile receiver, a base station receiver, a receiver, and a transceiver.

23. The SISO of claim 1, wherein the TTCM decoder decodes information that is received at a rate greater than substantially 80 mega-bits per second.

24. A soft-in soft-out functional block (SISO) that iteratively decodes a plurality of symbols, of a received data frame, that are encoded according to a rate control sequence, the SISO comprising:

an extrinsic calculation functional block that calculates a plurality of min* extrinsic outputs for a plurality of input bits of a symbol within the plurality of symbols according to the rate control sequence;

an extrinsic decoding functional block that employs the plurality of min* extrinsic outputs and the plurality of apps to generate a plurality of extrinsic values and a decoded plurality of input bits of the symbol within the plurality of symbols; and

an uncoded bit selection determination functional block that generates an uncoded bit select value for use in selecting a best estimate of an uncoded bit from among a plurality of possible uncoded bit values when at least one symbol of the plurality of symbols of the received data frame comprises the uncoded bit.

25. The SISO of claim 24, wherein the extrinsic calculation functional block employs a plurality of trellis metrics, a plurality of ‘

a priori’

probability values (apps), a plurality of forward metric values (alphas), and a plurality of backward metric values (betas) to calculate the plurality of min* extrinsic outputs.

26. The SISO of claim 24, wherein the extrinsic decoding functional block also employs a plurality of ‘

a priori’

probability values (apps) to generate the plurality of extrinsic values and the decoded plurality of input bits of the symbol within the plurality of symbols.

27. The SISO of claim 24, wherein the uncoded bit selection determination functional block employs the decoded plurality of input bits of the symbol within the plurality of symbols, a plurality of forward metric values (alphas), and a plurality of backward metric values (betas) to generate the uncoded bit select value.

28. The SISO of claim 24, wherein the plurality of min* extrinsic outputs comprises a plurality of minimum extrinsic outputs and a plurality of log extrinsic outputs.

29. The SISO of claim 24, wherein the plurality of log extrinsic outputs comprises a constant offset that ensures positively valued log extrinsic outputs.

30. The SISO of claim 24, wherein the SISO performs processing on a clock cycle basis;

the extrinsic calculation functional block calculates the plurality of min* extrinsic outputs on the clock cycle basis; and

the extrinsic decoding functional block decodes the plurality of input bits of the symbol within the plurality of symbols on the clock cycle basis.

31. The SISO of claim 24, wherein the extrinsic calculation functional block comprises an extrinsic app functional block that selectively adds a plurality of ‘

a prior’

probability values (apps) with a plurality of trellis metrics according to a trellis when calculating the plurality of min* extrinsic outputs; and

the trellis is employed to decode symbols encoded using different modulations according to the rate control sequence.

32. The SISO of claim 24, wherein the extrinsic calculation functional block initially performs min* processing on a plurality of forward metric values (alphas) and a plurality of trellis metrics thereby generating the plurality of min* outputs;

and

the extrinsic calculation functional block subsequently performs min* processing on the plurality of min* outputs and a plurality of backward metric values (betas) when calculating the plurality of min* extrinsic outputs.

33. The SISO of claim 32, wherein the plurality of forward metric values (alphas) and the plurality of trellis metrics are selectively combined for the min* processing according to the trellis;

and

the trellis is employed to decode symbols encoded using different modulations according to the rate control sequence.

34. The SISO of claim 24, wherein the extrinsic calculation functional block comprises a plurality of extrinsic min* trees;

and

each extrinsic min* tree being operable to calculate a probability of an input bit of the plurality of input bits of the symbol within the plurality of symbols comprising a value of a 1 or a 0.

35. The SISO of claim 24, wherein the uncoded bit selection determination functional block employs min* processing to generate the uncoded bit select value.

36. The SISO of claim 35, wherein the uncoded bit select value and at least one of the decoded input bits is used to select the best estimate of the uncoded bit from among the plurality of possible uncoded bit values.

37. The SISO of claim 24, wherein the plurality of symbols being encoded using a systematic turbo trellis coded modulation (TTCM) encoder.

38. The SISO of claim 24, wherein the plurality of symbols being encoded using a non-systematic turbo trellis coded modulation (TTCM) encoder.

39. The SISO of claim 24, wherein the SISO is contained within a turbo trellis coded modulation (TTCM) decoder;

and

the TTCM decoder is contained within at least one of a satellite receiver, a high definition television (HDTV) set top box receiver, a mobile receiver, a base station receiver, a receiver, and a transceiver.

40. The SISO of claim 24, wherein the SISO is contained within a decoder that decodes information that is received at a rate greater than substantially 80 mega-bits per second.

41. An extrinsic calculation and decoding method that iteratively decodes a plurality of symbols, comprising:

receiving a rate control sequence, a plurality of trellis metrics, a plurality of forward metric values (alphas) and a plurality of backward metric values (betas) corresponding to a trellis, and a plurality of ‘

a priori’

probability values (apps);

decoding the plurality of ‘

a priori’

probability values (apps);

selectively adding the decoded plurality of ‘

a priori’

probability values (apps) to the plurality of trellis metrics thereby generating a plurality of ap_metrics according to the rate control sequence;

performing min* processing on a plurality of combinations of input bits thereby generating a plurality of minimum extrinsic outputs and a plurality of log extrinsic outputs, the min* processing employs the plurality of forward metric values (alphas), the plurality of backward metric values (betas), and the plurality of ap_metrics; and

decoding the input bits by selectively summing the plurality of minimum extrinsic outputs and the plurality of log extrinsic outputs thereby generating a plurality of extrinsic outputs.

42. The method of claim 41, further comprising selectively decoding an uncoded bit using the decoded input bits according to the rate control sequence when at least one symbol of the plurality of symbols comprises the uncoded bit.

43. The method of claim 42, further comprising performing min* processing to generate an uncoded bit select value for use in selecting a best estimate of the uncoded bit from among a plurality of possible uncoded bit values.

44. The method of claim 43, further comprising employing one of the decoded input bits, the plurality of forward metric values (alphas), and the plurality of backward metric values (betas) to generate the uncoded bit select value.

45. The method of claim 41, further comprising:

calculating a first sum of values selected from the plurality of extrinsic outputs that is indicative of a possibility of one of the input bits comprising a value of 1;

calculating a second sum of values selected from the plurality of extrinsic outputs that is indicative of a possibility of the one of the input bits comprising a value of 0; and

assigning the value of the one of the inputs bits to the value 1 when a magnitude of the first sum is smaller than the second sum and alternatively assigning the value of the one of the inputs bits to the value 0 when a magnitude of the first sum is larger than the second sum.

46. The method of claim 41, wherein the min* processing comprises initially performing min* processing on the plurality of forward metric values (alphas) and the plurality of ap_metrics thereby generating a plurality of intermediate min* outputs;

and

subsequently performing min* processing on the plurality of intermediate min* outputs and the plurality of backward metric values (betas).

47. The method of claim 46, wherein the min* processing is performed using a plurality of extrinsic min* trees;

and

each extrinsic min* tree being operable to calculate a probability of one of the input bits comprising a value of a 1 or a 0.

48. The method of claim 41, wherein the plurality of extrinsic outputs comprises a constant offset to ensure each of the extrinsic outputs within the plurality of extrinsic outputs is positively valued.

49. The method of claim 41, wherein the method is performed within at least one of a satellite receiver, a high definition television (HDTV) set top box receiver, a mobile receiver, a base station receiver, a receiver, and a transceiver.

50. The method of claim 41, wherein the method decodes information that is received at a rate greater than substantially 80 mega-bits per second.

51. An extrinsic calculation and decoding method that iteratively decodes a plurality of symbols, comprising:

receiving a rate control sequence, a plurality of trellis metrics, a plurality of forward metric values (alphas) and a plurality of backward metric values (betas) corresponding to a trellis, and a plurality of ‘

a priori’

probability values (apps);

decoding the plurality of ‘

a priori’

probability values (apps);

selectively adding the decoded plurality of ‘

a priori’

probability values (apps) to the plurality of trellis metrics thereby generating a plurality of ap_metrics according to the rate control sequence;

performing min* processing on a plurality of combinations of input bits thereby generating a plurality of minimum extrinsic outputs and a plurality of log extrinsic outputs, the min* processing employs the plurality of forward metric values (alphas), the plurality of backward metric values (betas), and the plurality of ap_metrics;

decoding the input bits by selectively summing the plurality of minimum extrinsic outputs and the plurality of log extrinsic outputs thereby generating a plurality of extrinsic outputs;

calculating a first sum of values selected from the plurality of extrinsic outputs that is indicative of a possibility of one of the input bits comprising a value of 1; and

.

calculating a second sum of values selected from the plurality of extrinsic outputs that is indicative of a possibility of the one of the input bits comprising a value of 0; and

assigning the value of the one of the inputs bits to the value 1 when a magnitude of the first sum is smaller than the second sum and alternatively assigning the value of the one of the inputs bits to the value 0 when a magnitude of the first sum is larger than the second sum; and

selectively decoding an uncoded bit according to the rate control sequence by performing min* processing, employing one of the decoded input bits, the plurality of forward metric values (alphas), and the plurality of backward metric values (betas), to generate an uncoded bit select value for use in selecting a best estimate of an uncoded bit from among a plurality of possible uncoded bit values when at least one symbol of the plurality of symbols comprises the uncoded bit.

52. The method of claim 51, wherein the min* processing comprises initially performing min* processing on the plurality of forward metric values (alphas) and the plurality of ap_metrics thereby generating a plurality of intermediate min* outputs;

and

subsequently performing min* processing on the plurality of intermediate min* outputs and the plurality of backward metric values (betas).

53. The method of claim 51, wherein the min* processing is performed using a plurality of extrinsic min* trees;

and

each extrinsic min* tree being operable to calculate a probability of one of the input bits comprising a value of a 1 or a 0.

54. The method of claim 51, wherein the plurality of extrinsic outputs comprises a constant offset to ensure each of the extrinsic outputs within the plurality of extrinsic outputs is positively valued.

55. The method of claim 51, wherein the method is performed within at least one of a satellite receiver, a high definition television (HDTV) set top box receiver, a mobile receiver, a base station receiver, a receiver, and a transceiver.

56. The method of claim 51, wherein the method decodes information that is received at a rate greater than substantially 80 mega-bits per second.