Monolithic array amplifier with periodic bias-line bypassing structure and method
First Claim
1. A monolithic array amplifier comprising:
- a plurality of amplification units arranged in a grid-like structure on a monolithic substrate; and
a grid-bias network separating the amplification units to provide DC power to the amplification units,wherein each amplification unit comprises bias-line bypass circuits in a periodic structure,wherein each bias-line bypass circuit includes resistive-inductive-capacitance networks comprising;
thin-film capacitors;
inductive wire bridges coupling the capacitors to bias streets of the grid-bias network; and
thin-film resistors coupling the capacitors to ground vias.
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Accused Products
Abstract
A bias-line bypassing structure comprises a plurality of bias-line bypass circuits forming a periodic structure at least partially around each of a plurality of amplification units to reduce RF current flow between the amplification units and a grid-bias network. Each bias-line bypass circuit may comprise thin-film capacitors, inductive wire bridges, and thin-film resistors connected to ground vias. The thin-film capacitors may have differing values selected to resonate with an associated one of the inductive wire bridges and an associated one of the thin-film resistors to shunt RF current flow over a range of RF frequencies. In some embodiments, the inductive wire bridges may comprise inductive wire-bridge fuses to provide an open circuit in case an associated one the thin-film capacitors shorts to ground. The bias-line bypass circuits may be positioned along a bias street of the grid-bias network and spaced apart by less than a quarter-wavelength of an effective propagation constant of the bias line.
24 Citations
27 Claims
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1. A monolithic array amplifier comprising:
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a plurality of amplification units arranged in a grid-like structure on a monolithic substrate; and a grid-bias network separating the amplification units to provide DC power to the amplification units, wherein each amplification unit comprises bias-line bypass circuits in a periodic structure, wherein each bias-line bypass circuit includes resistive-inductive-capacitance networks comprising; thin-film capacitors; inductive wire bridges coupling the capacitors to bias streets of the grid-bias network; and thin-film resistors coupling the capacitors to ground vias. - View Dependent Claims (2, 3, 4, 5, 11)
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6. A monolithic array amplifier comprising:
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a plurality of amplification units arranged in a grid-like structure on a monolithic substrate; and a grid-bias network separating the amplification units to provide DC power to the amplification units, wherein each amplification unit comprises bias-line bypass circuits in a periodic structure, wherein the monolithic substrate comprises a semiconductor material, and wherein the bias-line bypass circuits are positioned along a bias street of the grid-bias network and spaced apart by less than a quarter-wavelength of an effective propagation constant of the bias street, and wherein the semiconductor material comprises a material selected from the group consisting of Indium-Phosphide (JnP), Gallium Arsenide (GaAs), Gallium Nitride (GaN), and Silicon (Si). - View Dependent Claims (7, 8, 9)
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10. A monolithic array amplifier comprising:
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a plurality of amplification units arranged in a grid-like structure on a monolithic substrate; and a grid-bias network separating the amplification units to provide DC power to the amplification units, wherein each amplification unit comprises bias-line bypass circuits in a periodic structure, wherein at least some of the amplification units of the plurality comprise; a receive antenna; a transmit antenna; and a power amplifier to receive a bias voltage from the grid-bias network and to amplify millimeter-wave frequencies received by the receive antenna for transmission by the transmit antenna, and wherein the receive antennas are configured to receive a substantially vertically-polarized wavefront at a millimeter-wave frequency, the power amplifiers are configured to amplify signals to provide a substantially horizontally-polarized wavefront, and the transmit antennas are configured to transmit the amplified signals to generate the high-power collimated wavefront at the millimeter-wave frequency.
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12. A method of decoupling a bias structure in a monolithic array amplifier comprising:
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providing DC power to a plurality of amplification units arranged in a grid-like structure with a grid-bias network separating the amplification units; and reducing RF current flow between the amplification units and the grid-bias network with a periodic structure of bias-line bypass circuits within each of the amplification units, wherein reducing comprises shunting RF current flow over a range of RF frequencies with a plurality of RLC networks that comprise each bias-line bypass circuit, each bias-line bypass circuit comprising thin-film capacitors, inductive wire bridges coupling the capacitors to bias streets of the grid-bias network, and thin-film resistors coupling the capacitors to ground vias, wherein the capacitors of each bias line circuit have differing values selected to resonate with an associated one of the thin-film resistors and an associated one of the inductive wire bridges. - View Dependent Claims (13, 14, 16, 17)
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15. A method of decoupling a bias structure in a monolithic array amplifier comprising:
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providing DC power to a plurality of amplification units arranged in a grid-like structure on a monolithic semiconductor substrate with a grid-bias network separating the amplification units; and reducing RF current flow between the amplification units and the grid-bias network with a periodic structure of bias-line bypass circuits within each of the amplification units, wherein the monolithic substrate comprises a semiconductor material, and wherein reducing comprises positioning the bias-line bypass circuits along a bias street of the grid-bias network to have a spacing of less than a quarter-wavelength of an effective propagation constant of the bias street.
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18. A bias-line bypassing structure comprising a plurality of bias-line bypass circuits positioned in a periodic structure at least partially around each of a plurality of circuit elements to reduce RF current flow between the circuit elements and a grid-bias network for providing bias current to the circuit elements,
wherein each bias-line bypass circuit comprises thin-film capacitors, inductive wire bridges coupling the capacitors to bias streets of the grid-bias network, and thin-film resistors coupling the capacitors to ground vias, wherein the capacitors have differing values selected to resonate with an associated one of the inductive wire bridges and an associated one of the thin-film resistors to shunt RF current flow over a range of RF frequencies.
Specification