Parallel concatenated code with soft-in soft-out interactive turbo decoder

• US 7,035,342 B2
• Filed: 09/12/2001
• Issued: 04/25/2006
• Est. Priority Date: 09/12/2000
• Status: Active Grant

• Current Assignee: Broadcom Corporation (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Shen, Ba-Zhong, Jones, Christopher R., Tran, Hau Thien, Cameron, Kelly B.
• Primary Examiner(s): Chin, Stephen
• Assistant Examiner(s): WANG, TED M
• Application Number:
  US09/952,455
• Publication Number:
  US 20020061070A1
• Time in Patent Office: 1,686 Days
• Field of Search: 375/265, 375/264, 375/298, 375/295, 375/340, 375/341, 375/262, 375/222, 714/701, 714/775, 714/794, 714/755, 714/762, 714/792, 714/795, 370/201
• US Class Current: 375/265
• CPC Class Codes: H03M 13/151 using error location or error correction polynomials
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/25 Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2757 Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
• CPC Class Codes: H03M 13/29 combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
• CPC Class Codes: H03M 13/2966 Turbo codes concatenated with another code, e.g. an outer block code
• CPC Class Codes: H03M 13/2978 Particular arrangement of the component decoders
• CPC Class Codes: H03M 13/3905 Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
• CPC Class Codes: H03M 13/3922 Add-Compare-Select [ACS] operation in forward or backward recursions
• CPC Class Codes: H03M 13/3927 Log-Likelihood Ratio [LLR] computation by combination of forward and backward metrics into LLRs
• CPC Class Codes: H03M 13/3972 using sliding window techniques or parallel windows
• CPC Class Codes: H03M 13/3988 for rate k/n convolutional codes, with k>1, obtained by convolutional encoders with k inputs and n outputs
• CPC Class Codes: H03M 13/4107 implementing add, compare, select [ACS] operations
• CPC Class Codes: H03M 13/6505 Memory efficient implementations
• CPC Class Codes: H03M 13/6561 Parallelized implementations
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 1/0065 : Serial concatenated codes
• CPC Class Codes: H04L 1/0066 : Parallel concatenated codes
• CPC Class Codes: H04L 1/0068 : by puncturing
• CPC Class Codes: H04L 1/0071 : Use of interleaving interleaving per se H03M13/27

Abstract

A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Solomon encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

Claims

1. A modulo-N turbo-encoder for encoding an information signal the modulo-N turbo-encoder comprising:

N+1 interleavers for interleaving the information signal and producing an interleaved information signal, where N is an integer greater than one; and

N+1 constituent encoders for encoding the interleaved information signal,

wherein N out of the N+1 interleavers comprise separable tuple (ST) interleavers.

2. The modulo-N turbo-encoder of claim 1 wherein the N+1 constituent encoders are nonsystematic encoders.

3. The modulo-N turbo-encoder of claim 1 wherein the N+1 constituent encoders are convolutional encoders.

4. The modulo-N turbo-encoder of claim 2 wherein the N+1 nonsystematic constituent encoders are recursive encoders.

5. The module-N turbo-encoder of claim 1 wherein the N+1 interleavers are odd-even interleavers.

6. The modulo-N turbo-encodes of claim 1 wherein the N+1 interleavers are bit interleavers.

7. The modulo-N turbo-encoder of claim 5 further comprising:

a selector that selects an odd encoding from the encoded information signal, and an even encoding from the encoded interleaved information signal; and

means for concatenating the selected odd encoding to the selected even encoding to form a composite signal.

8. The modulo-N turbo-encoder of claim 7 further comprising a signal mapper that accepts the composite signal.

9. The modulo-N turbo encoder of claim 1 wherein the N+1 constituent encoders are modulo-N turbo trellis encoders.

10. A modulo-N turbo-encoder for encoding an information signal the modulo-N turbo-encoder comprising:

N interleavers for interleaving the information signal and forming N interleaved versions of the information signal, where N is an integer greater than one; and

N+1 constituent encoders for encoding the information signal and for encoding the N interleaved versions of the information signal,

wherein the N interleavers comprise separable tuple (ST) interleavers.

11. The modulo-N turbo-encoder of claim 10 wherein the N+1 constituent encoders are nonsystematic encoders.

12. The modulo-N turbo-encoder of claim 10 further comprising:

a selector that alternately selects between the encoded information signal and the interleaved information signal and provides the result as a concatenated signal; and

a mapper that accepts the concatenated signal and performs a mapping on it.

13. The modulo-N turbo-encoder of claim 10 wherein the N+1 constituent encoders are recursive encoders.

14. The modulo-N turbo-encoder of claim 10 wherein the N+1 constituent encoders are convolutional encoders.

15. The modulo-N turbo-encoder of claim 10 wherein the N interleavers are bit interleavers.

16. The modulo-N turbo-encoder of claim 10 further comprising:

a selector that selects a first encoding from the encoded information signal and selects N+1 encodings from the encoded interleaved information signal; and

a mapper that accepts selecced encodings iron the selector.

17. The modulo-N turbo-encoder of claim 10 wherein the N interleavers are random inerleavers.

18. The modulo-N turbo-encoder of claim 10 wherein the N interleavers are block interleavers.

19. The modulo-N turbo-encoder of claim 10 wherein the N+1 constituent encoders are modulo-N turbo trellis encoders.

20. An apparatus for communicating data, the apparatus comprising:

a modulo-N turbo-encoder for encoding the data to produce encoded data, wherein N is an integer greater than one;

means for communicating the encoded data across a channel; and

a modulo-N decoder for decoding the encoded data received from the channel, wherein the modulo-N turbo-encoder includes;

N+1 interleavers for interleaving the data to produce interleaved data; and

N+1 constituent encoders for encoding the interleaved data,

wherein N out of the N+1 interleavers comprise separable tuple (ST) interleavers.

22. The apparatus as in claim 20 wherein the modulo-N decoder is a modulo-N parallel decoder.

21. An apparatus for communicating data, the apparatus comprising:

a modulo-N turbo-encoder for encoding the data to produce encoded data, wherein N is an integer greater than one;

means for communicating the encoded data across a channel; and

a modulo-N decoder for decoding the encoded data received from the channel,

wherein the modulo-N turbo-encoder includes;

N interleavets for interleaving the data and forming N interleaved versions of the data; and

N+1 constituent encoders for encoding the data and for encoding the N interleaved versions of the data, wherein the N interleavers comprise separable tuple (ST) interleavers.

23. The apparatus as in claim 21 wherein the modulo-N decoder is a modulo-N parallel decoder.