Method for resolving address space conflicts between a virtual machine monitor and a guest operating system

• US 7,035,963 B2
• Filed: 12/27/2000
• Issued: 04/25/2006
• Est. Priority Date: 12/27/2000
• Status: Expired due to Fees

• Current Assignee: Intel Corporation
• Original Assignee: Intel Corporation
• Inventors: Neiger, Gilbert, Uhlig, Richard, Jeyasingh, Stalinselvaraj, Kagi, Alain, Cota-Robles, Erik, Chou, Stephen, Kozuch, Michael, Schoenberg, Sebastian
• Primary Examiner(s): Elmore, Reba I.
• Application Number:
  US09/752,587
• Publication Number:
  US 20030120856A1
• Time in Patent Office: 1,945 Days
• Field of Search: 711/6, 711/165, 709/1
• US Class Current: 711/6
• CPC Class Codes: G06F 12/0284 Multiple user address space allocation, e.g. using different base addresses interprocessor communication G06F15/163
• CPC Class Codes: G06F 12/1036 for multiple virtual address spaces, e.g. segmentation G06F12/1045 takes precedence
• CPC Class Codes: G06F 12/109 for multiple virtual address spaces, e.g. segmentation G06F12/1036 takes precedence
• CPC Class Codes: G06F 2009/45583 Memory management, e.g. access or allocation
• CPC Class Codes: G06F 9/45558 Hypervisor-specific management and integration aspects

Abstract

In one embodiment, a method for resolving address space conflicts includes detecting that a guest operating system attempts to access a region occupied by a first portion of a virtual machine monitor and relocating the first portion of the virtual machine monitor within the first address space to allow the guest operating system to access the region previously occupied by the first portion of the virtual machine monitor.

Claims

1. A method comprising:

locating a second portion of a virtual machine monitor (VMM) in a second address space associated with the VMM;

mapping a first portion of the VMM into a first address space and the second address space, the first address space being associated with a guest operating system;

detecting that the guest operating system attempts to access a region occupied by the first portion of the VMM within the first address space;

if determining that no unused region exists within the first address space, selecting a random region within the first address space, copying content of a memory located at the random region to the second address space, re-mapping the first portion of the VMM into the random region, and accessing the copied content of the memory in the second address space if detecting an attempt of the guest operating system to access the content of the memory previously located at the random region; and

periodically relocating the first portion of the VMM within the first address space until finding a region that is infrequently used.

2. The method of claim 1 wherein the first portion of the VMM includes a set of VMM code and data structures that are architecturally required to reside in the first address space.

3. The method of claim 1 wherein the first portion of the VMM includes a set of trap handlers and an interrupt-descriptor table (IDT).

4. The method of claim 1 further comprising:

receiving control over an event initiated by the guest operating system when the event may potentially cause an address space conflict between the guest operating system and the VMM.

5. The method of claim 4 wherein receiving control further comprises:

setting access rights of the section occupied by the first portion of the VMM to a more privileged level than a privilege level associated with the guest operating system; and

receiving a trap caused by an attempt of the guest operating system to access a hardware resource having a higher privilege level than the privilege level associated with the guest operating system.

6. The method of claim 5 further comprising:

determining that the trap can be handled by the first portion of the VMM;

executing code associated with the trap; and

returning control over the event to the guest operating system.

7. The method of claim 5 further comprising:

determining that the trap should be handled by the second portion of the VMM;

delivering the trap to the second portion of the VMM;

passing control over the event to the guest operating system after code associated with the trap was executed by the second portion of the VMM.

8. The method of claim 1 wherein relocating the first portion of the VMM comprises:

finding an unused region within the first address space; and

re-mapping the first portion of the VMM into the unused region.

9. An apparatus comprising:

a first address space associated with a guest operating system;

a second address space associated with a virtual machine monitor (VMM); and

a virtual machine kernel to locate a second portion of the VMM in the second address space, to map a first portion of the VMM into the first address space and the second address space, to detect that the guest operating system attempts to access a region occupied by the first portion of the VMM within the first address space, to determine char no unused region exists within the first address space, to select a random region within the first address space, to copy content of a memory located at the random region to the second address space, to re-map the first portion of the VMM into the random region, to access the copied content of the memory in the second address space it detecting an attempt of the guest operating system to access the content of the memory previously located at the random region, and to periodically relocate the first portion of the VMM within the first address space until finding a region that is infrequently used.

10. The apparatus of claim 9 wherein the first portion of the VMM includes a set of VMM code and data structures that are architecturally required to reside in the first address space.

11. The apparatus of claim 9 wherein the first portion of the VMM includes a set of trap handlers and an interrupt-descriptor table (IDT).

12. The apparatus of claim 9 wherein the virtual machine kernel is to receive control over an event initialed by the guest operating system when the event may potentially cause an address space conflict between the guest operating system and the VMM.

13. The apparatus of claim 12 wherein the virtual machine kernel is to receive control by setting access rights of the section occupied by the first portion of the VMM to a more privileged level than a privilege level associated with the guest operating system, and by receiving a trap caused by an attempt of the guest operating system to access a hardware resource having a higher privilege level than the privilege level associated with the guest operating system.

14. The apparatus of claim 13 wherein the virtual machine kernel is to further determine that the trap can be handled by the first portion of the VMM, to execute code associated with the trap, and to return control over the event to the guest operating system.

15. The apparatus of claim 13 wherein the virtual machine kernel is to further determine that the trap should to handled by the second portion of the VMM, to deliver the trap to the second portion of the VMM, and to pass control over the event to the guest operating system after code associated with the trap was executed by the second portion of the VMM.

16. The apparatus of claim 9 wherein the virtual machine kernel is to relocate the first portion of the VMM by finding an unused region within the first address space and re-mapping the first portion of the VMM into the unused region.

17. A system comprising:

a memory to include a first address space associated with a guest operating system and a second address space associated with a virtual machine monitor (VMM); and

a processor, coupled to the memory, to locate a second portion of the VMM in the second address space, to map a first portion of the VMM into the first address space and the second address space, to detect that the guest operating system attempts to access a region occupied by the first portion of the VMM within the first address space, to determine that no unused region exists within the first address space, to select a random region within the first address space, to copy content of a memory located at the random region to the second address space, to re-map the first portion of the VMM into the random region, to access the seconded content of the memory in the second address space if detecting an attempt of the guest operating system to access the content of the memory previously located at the random region, and to periodically relocate the first portion of the VMM within the first address space until finding a region that is infrequently used.

18. The system of claim 17 wherein the first portion of the VMM includes a set of VMM code and data structures that are architecturally required to reside in the first address space.

19. The system of claim 17 wherein the first portion of the VMM includes a set of trap handlers and an interrupt-descriptor table (IDT).

20. A computer readable medium that provides instructions, which when executed on a processor, cause said processor to perform operations comprising:

locating a second portion of the VMM in a second address space associated with the VMM;

mapping a first portion of the VMM into a first address space and the second address space, the first address space being associated with a guest operating system;

detecting that the guest operating system attempts to access a region occupied by the first portion of the VMM within a the first address space;

if determining that no unused region exists within the first address space, selecting a random region within the first address space, copying content of a memory located at the random region to the second address space, re-mapping the first portion of the in the random region, and accessing the copied content of the memory in the second address space if detecting an attempt of the guest operating system to access the content of the memory previously located at the random region; and

periodically relocating the first portion of the VMM within the first address space until finding a region that is infrequently used.

21. The computer readable medium of claim 20 comprising further instructions causing the processor to perform operations comprising:

finding an unused region within the first address space; and

re-mapping the first portion of the VMM into the unused region.