Flash memory data access method and configuration employing logical-to-virtual and virtual-to-physical sector mapping

• US 7,035,993 B2
• Filed: 04/08/2002
• Issued: 04/25/2006
• Est. Priority Date: 01/11/2002
• Status: Expired due to Term

• Current Assignee: Western Digital Technologies Incorporated (Western Digital Corporation)
• Original Assignee: Simpletech, Inc. (Western Digital Corporation)
• Inventors: Wu, Chien-Hung, Tai, Shih-Chieh
• Primary Examiner(s): Kim, Hong Chong
• Assistant Examiner(s): Thomas, Shane M.
• Application Number:
  US10/063,278
• Publication Number:
  US 20030135688A1
• Time in Patent Office: 1,478 Days
• Field of Search: 711/156, 711/103, 711/111, 711/202, 365/185.01, 365/185.11, 365/185.29, 365/185.33
• US Class Current: 711/206
• CPC Class Codes: G06F 12/0246 in block erasable memory, e.g. flash memory
• CPC Class Codes: G06F 3/0616 in relation to life time, e.g. increasing Mean Time Between Failures [MTBF]
• CPC Class Codes: G06F 3/064 Management of blocks
• CPC Class Codes: G06F 3/0679 Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]

Abstract

A flash memory configuration and access method having a particular conversion method that uses the page or the sector in each flash memory block instead of the block that is commonly used as the base of the data conversion storage to store data. When data is written into the physical flash block of the flash memory, the original logic sector information can be preserved. The data is written into the same block of the flash memory in a manner according to the sequence as it is received instead of the sequence of the logic sector. Therefore, the block position does not move to refresh the block content until the physical block is full. Consequently, the number of times to move the physical block of the flash memory can be reduced to increase the lifetime of the flash memory. Moreover, since the number of times to erase is reduced, so that the writing speed can speed up to improve the operation efficiency.

Claims

1. A flash memory data access method, for data access between a host and a flash memory device, wherein the host sequentially accesses data by using a plurality of logical elements stored in a logical portion, wherein the host writes data to the flash memory device by providing the plurality of logical elements, and the flash memory device includes a physical portion, wherein the physical portion comprises a plurality of physical elements for storing data, wherein the method comprises:

mapping logical elements of the logical portion to virtual elements of a virtual portion of the flash memory device;

creating a virtual-to-physical (VP) table, which maps virtual units of the virtual portion to physical units of the physical portion; and

creating a screen element table if the logical elements provided by the host are out of sequence, wherein the screen element table maps the virtual elements in each one of the virtual units to the physical elements of a physical unit corresponding to the virtual unit,

wherein the screen element table has a table data structure,

wherein the VP table and the screen element table exist in separate tables,

wherein, if the logical elements provided by the host are in sequence, the logical elements requested by the host are mapped to physical elements via the VP table by unit,

wherein, if the logical elements provided by the host are out of sequence, the logical elements requested by the host are mapped to physical elements first via the VP table by unit and subsequently via the screen element table by element, and

wherein an empty physical element of the physical elements is written in response to a request from the host.

2. The flash memory data access method of claim 1, wherein a logical element is a logical sector, a virtual element is a virtual sector, and a physical element is a physical sector.

3. The flash memory data access method of claim 2, wherein the logic sector is translated between the host and the flash memory prescribed by LBA (Logical Block Addressing) mode of the ATA (Advanced Technology Attachment) protocol.

4. The flash memory data access method of claim 2, wherein a write sequence on the physical elements accesses the empty physical element via the screen element table in a different sequence than a write sequence of the logical elements requested by the host.

5. A flash memory data access method, for data access between a host and a flash memory device, wherein the host sequentially accesses data by using a plurality of logical elements stored in a logical portion, wherein the host writes data to the flash memory device by providing the plurality of logical elements, the flash memory device includes a physical portion, wherein the physical portion comprises a plurality of physical elements to store data, wherein the method comprises:

mapping logical elements of the logic portion to virtual elements of the virtual portion;

creating a virtual-to-physical (VP) table, which maps virtual units of the virtual portion to physical units of the physical portion;

creating a screen element table if the logical elements provided by the host are out of sequence, wherein the screen element table maps the virtual elements in each one of the virtual units to physical elements of the physical unit corresponding to the virtual unit; and

sequentially accessing the data according to a sequence of the logical elements requested by the host,

wherein the screen element table has a table data structure,

wherein the VP table and the screen element table exist in separate tables,

wherein, if the logical elements provided by the host are in sequence, the logical elements requested by the host are mapped to physical elements via the VP table by unit,

wherein, if the logical elements provided by the host are out of sequence, the logical elements requested by the host are mapped to physical elements first via the VP table by unit and subsequently via the screen element table by element, and

wherein an empty physical element of the physical elements is written in response to the sequence of the logical elements requested from the host.

6. The flash memory data access method of claim 5, wherein a logical element is a logical sector, a virtual element is a virtual sector, and a physical element is a physical sector.

7. The flash memory data access method of claim 6, wherein the logical sector is translated between the host and the flash memory prescribed by LBA (Logical Block Addressing) mode of the ATA (Advanced Technology Attachment) protocol.

8. The flash memory data access method of claim 6, wherein a write sequence on the physical elements accesses the empty physical element via the screen element table in a different sequence than a write sequence of the logical elements requested by the host.