Method and apparatus for micro-jet enabled, low energy ion generation and transport in plasma processing

• US 7,037,846 B2
• Filed: 01/06/2004
• Issued: 05/02/2006
• Est. Priority Date: 04/06/2001
• Status: Expired due to Term

• Current Assignee: Lam Research Corporation
• Original Assignee: Axcelis Technologies Incorporated
• Inventors: Srivastava, Aseem Kumar, Sawin, Herbert Harold, Sakthievel, Palanikumaran
• Primary Examiner(s): Deo, Duy-Vu N.
• Application Number:
  US10/752,906
• Publication Number:
  US 20040140053A1
• Time in Patent Office: 847 Days
• Field of Search: None
• US Class Current: 438/710
• CPC Class Codes: H01J 37/321 the radio frequency energy being inductively coupled to the plasma
• CPC Class Codes: H01J 37/32192 Microwave generated discharge H01J37/32357, H01J37/32366, H01J37/32394, H01J37/32403 take precedence

Abstract

A method for creating and transporting low-energy ions for use in plasma processing of a semiconductor wafer is disclosed. In an exemplary embodiment of the invention, the method includes generating plasma from a gas species to produce a plasma exhaust. The plasma exhaust is then introduced into a processing chamber containing the wafer. The ion content of the plasma exhaust is enhanced by activating a supplemental ion source as the plasma is introduced into the processing chamber, thereby creating a primary plasma discharge therein. Then, the primary plasma discharge is directed into a baffle plate assembly, thereby creating a secondary plasma discharge exiting the baffle plate assembly. The strength of an electric field exerted on ions contained in the secondary plasma discharge is reduced. In so doing, the reduced strength of the electric field causes the ions to bombard the wafer at an energy insufficient to cause damage to semiconductor devices formed on the wafer.

Claims

1. A method for creating and transporting low-energy ions for use in plasma processing of a semiconductor wafer, the method comprising:

generating plasma from a gas species to produce a plasma exhaust for introduction into a processing chamber containing the wafer;

enhancing the ion content of said plasma exhaust by activating a supplemental ion source, thereby creating a primary plasma discharge within said processing chamber;

directing said primary plasma discharge into a baffle plate assembly; and

generating a secondary plasma discharge from said baffle plate assembly, wherein ions in said secondary plasma discharge are subjected to an electric field determined by a floating potential of the wafer such that said ions are caused to bombard the wafer at an energy insufficient to cause damage to semiconductor devices formed on the wafer.

2. The method of claim 1, further comprising:

generating a first plasma density proximate a first electrode; and

generating a second plasma density proximate a second electrode;

wherein said second plasma density is greater than said first plasma density, and said second electrode has a surface area greater than a surface area of said first electrode.

3. The method of claim 2, wherein said generating said second plasma density further comprises configuring said baffle plate assembly so as to cause said secondary plasma discharge to comprise a plurality of micro-jets.

4. The method of claim 3, wherein:

said baffle plate assembly is configured to include an upper baffle plate and a lower baffle plate; and

at least one of said upper and said lower baffle plates is further configured with a plurality of chamfered holes located therethrough.

5. The method of claim 4, wherein said chamfered holes further comprise a frustoconical section and a cylindrical section.

6. The method of claim 4, wherein said at least one of said upper and said lower baffle plates is configured to isolate the wafer from a sheath potential created by said primary plasma discharge.

7. The method of claim 4, further comprising configuring said at least one of said upper and said lower baffle plate as said second electrode.

8. The method of claim 4, wherein said at least one of said upper and said lower baffle plates comprises one of quartz, sapphire, ceramic or sapphire-coated quartz.

9. The method of claim 4, wherein said at least one of said upper and said lower baffle plates is comprised of a conductive material.

10. The method of claim 9, wherein said conductive material is coated with a dielectric and wherein said conductive material is grounded.

11. The method of claim 10, wherein said dielectric is anodized aluminum.