Stereolithographic method for fabricating stabilizers for semiconductor devices

• US 7,041,533 B1
• Filed: 06/08/2000
• Issued: 05/09/2006
• Est. Priority Date: 06/08/2000
• Status: Expired due to Fees

• Current Assignee: Micron Technology, Inc.
• Original Assignee: Micron Technology, Inc.
• Inventors: Akram, Salman, Ahmad, Syed Sajid
• Primary Examiner(s): Thompson, Craig A.
• Assistant Examiner(s): BEREZNY, NEMA O
• Application Number:
  US09/590,621
• Time in Patent Office: 2,161 Days
• Field of Search: 438/108, 438/125, 264/401, 228/180.22
• US Class Current: 438/108
• CPC Class Codes: B33Y 80/00 Products made by additive manufacturing
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/0615 Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
• CPC Class Codes: H01L 2224/10135 Alignment aids
• CPC Class Codes: H01L 2224/13 of an individual bump connector
• CPC Class Codes: H01L 2224/13099 Material
• CPC Class Codes: H01L 2224/75 Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 2224/81136 involving guiding structures, e.g. spacers or supporting members
• CPC Class Codes: H01L 2224/81139 Guiding structures on the body
• CPC Class Codes: H01L 2224/81801 Soldering or alloying
• CPC Class Codes: H01L 23/16 Fillings or auxiliary members in containers or encapsulations, e.g. centering rings H01L23/42, H01L23/552 take precedence
• CPC Class Codes: H01L 24/10 Bump connectors bumps on insulating substrates, e.g. chip carriers, H01L23/49816; Manufacturing methods related thereto
• CPC Class Codes: H01L 24/13 of an individual bump connector
• CPC Class Codes: H01L 24/75 Apparatus for connecting with bump connectors or layer connectors
• CPC Class Codes: H01L 24/81 using a bump connector
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/014 : Solder alloys
• CPC Class Codes: H01L 2924/12042 : LASER
• CPC Class Codes: H01L 2924/351 : Thermal stress
• CPC Class Codes: H05K 2201/10568 : Integral adaptations of a component or an auxiliary PCB for mounting, e.g. integral spacer element
• CPC Class Codes: H05K 2201/10674 : Flip chip
• CPC Class Codes: H05K 2201/10734 : Ball grid array [BGA]; Bump grid array
• CPC Class Codes: H05K 2201/2036 : Permanent spacer or stand-off in a printed circuit or printed circuit assembly pattern for applying drops or paste H05K2203/0545
• CPC Class Codes: H05K 3/303 : Surface mounted components, e.g. affixing before soldering, aligning means, spacing means H05K3/32 takes precedence
• CPC Class Codes: H05K 3/3436 : having an array of bottom contacts, e.g. pad grid array or ball grid array components
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

One or more stabilizers are disposed on the surface of a semiconductor device component prior to bonding the same to a higher-level substrate. Upon assembly of the semiconductor device component face-down upon a higher-level substrate and joining conductive structures between the contact pads of the semiconductor device component and corresponding contact pads of the higher-level substrate, the stabilizers at least partially stabilize the semiconductor device component on the higher-level substrate to maintain a substantially parallel relation therebetween. The stabilizers can also be positioned and configured to define a minimum, substantially uniform distance between the semiconductor device component and the higher-level substrate. The stabilizers may be preformed structures or fabricated on the surface of the semiconductor device component, such as by way of a stereolithographic method.

Claims

1. A method of modifying a semiconductor die, comprising:

providing at least one semiconductor die having an active surface; and

forming on or securing to the active surface at least one stabilizer comprising at least two superimposed, contiguous, mutually adhered layers comprising a dielectric material such that the at least one stabilizer protrudes from the active surface, the at least one stabilizer being configured to space the at least one semiconductor die a substantially fixed distance apart from a higher-level substrate when disposed active surface down over the higher-level substrate.

2. The method of claim 1, wherein forming the at least one stabilizer comprises forming a plurality of stabilizers.

3. The method of claim 2, wherein forming the plurality of stabilizers comprises forming at least one stabilizer of the plurality of stabilizers adjacent at least one corner of the active surface.

4. The method of claim 2, wherein forming the plurality of stabilizers comprises forming at least two stabilizers adjacent opposite peripheral edges of the active surface.

5. The method of claim 2, wherein forming the plurality of stabilizers comprises forming selected ones of the plurality of stabilizers to have a height that defines a substantially consistent die-to-substrate distance.

6. The method of claim 1, wherein forming the at least one stabilizer comprises forming the at least one stabilizer from photoimageable material.

7. The method of claim 1, wherein providing comprises providing at least one semiconductor die having a sealing material on an active surface thereof and wherein the forming comprises forming the at least one stabilizer to be securable to the sealing material.

8. The method of claim 1, wherein providing comprises providing a semiconductor wafer including a plurality of semiconductor dice.

9. The method of claim 1, further comprising adhering the at least one stabilizer to the active surface.

10. The method of claim 1, wherein forming the at least one stabilizer comprises applying a layer of insulative material on the active surface and patterning the layer.

11. The method of claim 1, wherein forming the at least one stabilizer comprises applying a layer of photoresist material on the active surface and patterning the layer.

12. The method of claim 1, further comprising introducing an encapsulant material between the at least one semiconductor die and the high-level substrate.

13. The method of claim 1, wherein forming the at least one stabilizer comprises positioning the at least one stabilizer on the active surface so as to avoid contact with conductive traces on a carrier substrate.

14. The method of claim 1, further comprising disposing at least one conductive structure on at least one bond pad of the at least one semiconductor die.

15. The method of claim 14, wherein disposing comprises forming a solder bump on the at least one bond pad.

16. The method of claim 14, wherein disposing comprises applying one of a conductive pillar, a conductor filled epoxy pillar, and a structure of z-axis elastomer to the at least one bond pad.

17. A method of modifying a semiconductor device component, comprising:

providing at least one semiconductor substrate with contact pads on an active surface thereof; and

sequentially forming on the active surface at least one stabilizer having a plurality of superimposed, contiguous, mutually adhered layers of photopolymer, the at least one stabilizer being configured to at least partially stabilize an orientation of the semiconductor device component upon being disposed active surface down over a higher-level substrate.

18. A method of modifying a semiconductor device component, comprising:

placing at least one semiconductor substrate including at least one semiconductor die having an active surface with contact pads exposed thereon in a horizontal plane;

recognizing a location and orientation of the at least one semiconductor die;

stereolithographically forming on the active surface, between one of the contact pads and a peripheral edge of the at least one semiconductor substrate, at least one stabilizer comprising at least one layer of an electrically nonconductive semisolid material.

19. The method of claim 18, further comprising storing data including at least one physical parameter of the at least one semiconductor substrate in computer memory, and using the stored data in conjunction with a machine vision system to recognize the location and orientation of the at least one semiconductor substrate and to form the at least one stabilizer thereon.

20. The method of claim 19, further including in computer memory at least one parameter of another semiconductor device component to which the at least one semiconductor substrate is to be attached.

21. The method of claim 19, further comprising using stored data, in conjunction with the machine vision system, to selectively form the at least one layer of semisolid material stereolithographically on at least one portion of the active surface of the at least one semiconductor substrate.

22. The method of claim 19, further including securing the at least one semiconductor substrate to a carrier prior to placing the at least one semiconductor substrate in the horizontal plane.

23. A method for electrically bonding a semiconductor die having a surface and conductive structures protruding from the surface to a substrate having contacts positioned correspondingly to the conductive structures, the method comprising:

stereolithographically forming at least one stabilizer structure comprising a dielectric material on at least one of the surface and the substrate for disposal between the surface and the substrate;

inverting and positioning the semiconductor die on the substrate to contact the conductive structures to corresponding contacts; and

bonding the conductive structures to the corresponding contacts.

24. The method of claim 23, wherein stereolithographically forming at least one stabilizer structure comprises forming the at least one stabilizer structure to have a height less than a minimum distance the conductive structures protrude from the surface.

25. The method of claim 23, wherein stereolithographically forming at least one stabilizer structure comprises forming the at least one stabilizer structure to space the surface from the substrate a distance greater than a minimum distance at least one of the conductive structures protrudes from the surface.

26. The method of claim 25, wherein bonding comprises employing the at least one stabilizer structure to lengthen at least one of the conductive structures.

27. The method of claim 23, wherein stereolithographically forming at least one stabilizer structure comprises configuring the at least one stabilizer structure to be positioned between a periphery of the surface of the semiconductor device die and the conductive structures.

28. A method of modifying a semiconductor die, comprising:

providing at least one semiconductor die having an active surface with contact pads exposed thereon;

applying a layer of a partially uncured photopolymer to the at least one semiconductor die; and

stereolithographically forming on the at least one semiconductor die, between one of the contact pads and a peripheral edge of the at least one semiconductor die, at least one stabilizer securable to the active surface so as to protrude from the active surface, the at least one stabilizer being a structure configured to at least partially stabilize an orientation of the at least one semiconductor die when disposed active surface down over a higher-level substrate.

29. The method of claim 28, wherein forming the at least one stabilizer comprises forming a plurality of stabilizers.

30. The method of claim 29, wherein forming the plurality of stabilizers comprises forming at least one stabilizer of the plurality of stabilizers adjacent at least one corner of the active surface.

31. The method of claim 29, wherein forming the plurality of stabilizers comprises forming selected ones of the plurality of stabilizers to have a height that defines a substantially consistent die-to-substrate distance.

32. The method of claim 28, wherein providing comprises providing a semiconductor wafer including a plurality of semiconductor dice.

33. The method of claim 28, further comprising introducing an encapsulant material between the at least one semiconductor die and the higher-level substrate.

34. The method of claim 28, wherein forming the at least one stabilizer comprises positioning the at least one stabilizer on the active surface so as to avoid contact with conductive traces on a carrier substrate.

35. The method of claim 28, further comprising disposing at least one conductive structure on at least one bond pad of the at least one semiconductor die.

36. The method of claim 35, wherein disposing comprises forming a solder bump on the at least one bond pad.

37. A method for electrically bonding a semiconductor device component having a surface and conductive structures protruding from the surface to a substrate having contacts positioned correspondingly to the conductive structures, the method comprising:

stereolithographically forming at least one stabilizer structure on at least one of the surface and the substrate for disposal between the surface and the substrate to space the surface from the substrate a distance greater than a minimum distance at least one of the conductive structures protrudes from the surface;

inverting and positioning the semiconductor device component on the substrate to contact the conductive structures to corresponding contacts; and

bonding the conductive structures to the corresponding contacts.

38. The method of claim 37, wherein stereolithographically forming at least one stabilizer structure comprises forming at least one stabilizer structure comprising dielectric material.

39. The method of claim 37, wherein bonding comprises employing the at least one stabilizer structure to lengthen at least one of the conductive structures.

40. The method of claim 37, wherein stereolithographically forming at least one stabilizer structure comprises configuring the at least one stabilizer structure to be positioned between a periphery of the surface of the semiconductor device component and the conductive structures.