Low power consumption MIS semiconductor device

• US 7,042,245 B2
• Filed: 04/09/2003
• Issued: 05/09/2006
• Est. Priority Date: 10/25/2002
• Status: Expired due to Term

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Hidaka, Hideto
• Primary Examiner(s): WAMSLEY, PATRICK G
• Application Number:
  US10/409,585
• Publication Number:
  US 20040080340A1
• Time in Patent Office: 1,126 Days
• Field of Search: 326/98, 326/34, 326/83, 257/139, 257/260, 257/324, 257/326, 257/371, 257/392, 257/262, 257/393, 327/333, 327/514, 327/589, 327/424, 331/116.FE, 365/189.09, 365/233, 365/63, 365/185.19, 708/702
• US Class Current: 326/34
• CPC Class Codes: G11C 5/147 Voltage reference generators, voltage or current regulators; Internally lowered supply levels; Compensation for voltage drops G11C5/141 takes precedence
• CPC Class Codes: H01L 27/0922 Combination of complementary transistors having a different structure, e.g. stacked CMOS, high-voltage and low-voltage CMOS
• CPC Class Codes: H03K 19/0016 by using a control or a clock signal, e.g. in order to apply power supply

Abstract

A logic gate is constructed of an insulated gate field effect transistor (MIS transistor) having a thin gate insulation film. An operation power supply line to the logic gate is provided with an MIS transistor having a thick gate insulation film for switching the supply and stop of an operation power source voltage. A voltage of the gate of the power source switching transistor is made changing in an amplitude greater than an amplitude of an input and an output signal to the logic gate. Current consumption in a semiconductor device configured of MIS transistor of a thin gate insulation film can be reduced and an power source voltage thereof can be stabilized.

Claims

1. A semiconductor device comprising:

a logic gate constructed of an insulated gate field effect transistor having a first gate insulation film, and receiving a voltage of an internal power node as an operating power source voltage to operate, for processing a received signal;

a first switching transistor connected between said internal power node and a first power source node, having a second gate insulation film greater in thickness than said first gate insulation film, and rendered selectively conductive for coupling said first power source node with said internal power node in response to a switch control signal; and

a switch circuit for switching an amplitude of said switch control signal in response to an amplitude control signal for selectively applying one of the switch control signal having the amplitude switched and the switch control signal having the amplitude non-switched to said first switching transistor.

2. The semiconductor device according to claim 1, wherein said switch circuit switches the amplitude of said switch control signal between an amplitude same as an amplitude of an input signal of said logic gate and an amplitude greater than the amplitude of said input signal to said logic gate.

3. The semiconductor device according to claim 1, wherein

said semiconductor device has an active mode for performing a processing on said received signal and a plurality of kinds of internal operation stopping states for stopping the processing for said received signal, and

said switch circuit switches the amplitude of said switch control signal between said plurality of kinds of operation stopping states.