Phase-change memory and method having restore function
First Claim
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1. A phase-change memory device, comprising:
- a phase-change memory cell including a volume of material which is programmable between amorphous and crystalline states;
a write current source which selectively applies a first write current pulse to program the phase-change memory cell into the amorphous state and a second write current pulse to program the phase-change memory cell into the crystalline state; and
a restore circuit which selectively applies the first write current pulse to the phase-change memory cell to restore an amorphous state of the phase-change memory cell.
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Abstract
A phase-change memory device includes a phase-change memory cell having a volume of material which is programmable between amorphous and crystalline states. A write current source selectively applies a first write current pulse to program the phase-change memory cell into the amorphous state and a second write current pulse to program the phase-change memory cell into the crystalline state. The phase-change memory device further includes a restore circuit which selectively applies the first current pulse to the phase-change memory cell to restore at least an amorphous state of the phase-change memory cell.
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Citations
50 Claims
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1. A phase-change memory device, comprising:
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a phase-change memory cell including a volume of material which is programmable between amorphous and crystalline states; a write current source which selectively applies a first write current pulse to program the phase-change memory cell into the amorphous state and a second write current pulse to program the phase-change memory cell into the crystalline state; and a restore circuit which selectively applies the first write current pulse to the phase-change memory cell to restore an amorphous state of the phase-change memory cell. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A phase-change memory device, comprising:
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a phase-change memory cell including a volume of material which is programmable between amorphous and crystalline states; a write current source which operates in a low-power mode to selectively apply a first write current pulse to program the phase-change memory cell into the amorphous state and a second write current pulse to program the phase-change memory cell into the crystalline state, and which operates in a high-power mode to selectively apply a third write current pulse to program the phase-change memory cell into the amorphous state and a fourth write current pulse to program the phase-change memory cell into the crystalline state; and a restore circuit which is operative in the low-power mode to selectively apply the first current pulse to the phase-change memory cell to restore an amorphous state of the phase-change memory cell. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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- 24. A phase-change memory device which is operable in a non-volatile memory mode and a volatile memory mode, and which comprises a phase-change memory cell including a volume of material which is programmable between amorphous and crystalline states, and a restore circuit which restores at least an amorphous state of the phase-change memory cell in the volatile memory mode.
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35. A phase-change memory device, comprising:
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a data line; a plurality of I/O lines; a plurality of bit lines; a plurality of word lines; a plurality of phase-change memory cells at intersections of the word lines and bit lines, wherein each of said phase-change memory cells includes a volume of material which is programmable between amorphous and crystalline states; a write current source which outputs first and second write current pulses to the bit lines according to a voltage of the data line, the first write current pulse for programming the phase-change memory cells into the amorphous state and the second write current pulse for programming the phase-change memory cell into the crystalline state; a plurality of sense amplifiers, respectively connected to the bit lines and the I/O lines, which read respective states of the phase-change memory cells; and a restore circuit, connected to the I/O lines and to the data line, which controls the voltage of the data line to restore at least an amorphous state of the phase-change memory cells. - View Dependent Claims (36, 37, 38, 39, 40, 41, 42)
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43. A method of programming a phase-change memory cell, the phase-change memory cell including a volume of material which is programmable between amorphous and crystalline states, said method comprising:
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selectively applying first and second write current pulses to the phase-change memory cell, the first write current pulse for programming the phase-change memory cell into the amorphous state and the second write current pulse for programming the phase-change memory cell into the crystalline state; detecting a state of the phase-change memory cell; and conducting a first restore operation by again applying the first write current pulse to the phase-change memory cell when the phase-change memory cell is detected as the amorphous state. - View Dependent Claims (44, 45, 46, 47, 48, 49, 50)
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Specification