Bus system and bus interface
First Claim
1. A bus system comprising a first station and a second station coupled by a bus for transferring data and control signals, said bus operating according to a protocol in which said first station repeatedly sends requests to said second station and said second station responds to said requests by returning responses over the bus, the returned responses including an ACK response, a NAK response and an error response, said first station including an interruptible processor and a bus interface,said bus interface being operable for interrupting said interruptible processor in response to the ACK and error responses from said second station, but not interrupting said interruptible processor in response to the NAK response from said second station, andsaid interruptible processor is operable to handle the interrupts of said bus interface.
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Accused Products
Abstract
The invention relates to a bus system comprising a first station and a second station coupled by a bus for transferring data and control signals. The bus is conceived to operate according to a protocol in which the first station repeatedly sends requests to said second station and the second station responds to the requests. The first station comprises an interruptible processor and a bus interface. The bus interface is operable to interrupt the interruptible processor upon reception of selected responses of the second station. The interruptible processor is operable to handle the interrupts of the bus interface.
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Citations
12 Claims
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1. A bus system comprising a first station and a second station coupled by a bus for transferring data and control signals, said bus operating according to a protocol in which said first station repeatedly sends requests to said second station and said second station responds to said requests by returning responses over the bus, the returned responses including an ACK response, a NAK response and an error response, said first station including an interruptible processor and a bus interface,
said bus interface being operable for interrupting said interruptible processor in response to the ACK and error responses from said second station, but not interrupting said interruptible processor in response to the NAK response from said second station, and said interruptible processor is operable to handle the interrupts of said bus interface.
- 7. A bus interface comprising a connection for a bus and an interrupt output for applying an interrupt to an interruptible processor, characterized in that said bus interface also comprises a controller operable to receive responses including an ACK response, a NAK response and an error response, from said connection and interrupt said processor in response to the ACK and error responses by sending an interrupt signal to the interrupt output, but not interrupt said processor in response to the NAK response.
Specification