Method and apparatus for determining gate-level delays in an integrated circuit
First Claim
1. A method for determining a voltage at the output of a gate in an integrated circuit, comprising:
- receiving a design for the integrated circuit;
locating a gate within the integrated circuit; and
looking up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate;
applying each output current waveform to its corresponding effective capacitance to calculate a first set of voltage waveforms voltages;
applying each output current waveform to a given RC(L) network to calculate a second set of voltage waveforms voltages, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; and
for each time step in a series of time steps,selecting an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of voltage waveforms voltages at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of voltage waveforms voltages at the current time step, andapplying the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate.
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Abstract
A system is provided for determining voltage at the output of a gate in an integrated circuit. The system locates a gate within the integrated circuit and looks up a set of output current waveforms as a function of time for different effective capacitances at the gate'"'"'s output. The system applies each output current waveform to its corresponding effective capacitance to calculate a first set of output voltages and applies each output current waveform to a model of the net coupled to the output of the gate to calculate a second set of output voltages. For each time step in a series of time steps, the system selects an output current waveform for which a voltage in the first set of output voltage waveforms matches a voltage in the second set of output voltage waveforms. The system uses the selected output current waveform to determine the output voltage.
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Citations
21 Claims
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1. A method for determining a voltage at the output of a gate in an integrated circuit, comprising:
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receiving a design for the integrated circuit; locating a gate within the integrated circuit; and looking up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate; applying each output current waveform to its corresponding effective capacitance to calculate a first set of voltage waveforms voltages; applying each output current waveform to a given RC(L) network to calculate a second set of voltage waveforms voltages, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; and for each time step in a series of time steps, selecting an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of voltage waveforms voltages at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of voltage waveforms voltages at the current time step, and applying the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for determining a voltage at the output of a gate in an integrated circuit, the method comprising:
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receiving a design for the integrated circuit; locating a gate within the integrated circuit; and looking up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate; applying each output current waveform to its corresponding effective capacitance to calculate a first set of voltage waveforms voltages; applying each output current waveform to a given RC(L) network to calculate a second set of voltage waveforms voltages, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; and for each time step in a series of time steps, selecting an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of voltage waveforms voltages at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of voltage waveforms voltages at the current time step, and applying the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate. - View Dependent Claims (9, 10, 11, 12, 13, 14)
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15. An apparatus for determining a voltage at the output of a gate in an integrated circuit, comprising:
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a timing analysis tool configured to receive a design for the integrated circuit; wherein the timing analysis tool is further configured to locate a gate within the integrated circuit; wherein the timing analysis tool is further configured to look up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate; wherein the timing analysis tool is further configured to apply each output current waveform to its corresponding effective capacitance to calculate a first set of output voltage waveforms; wherein the timing analysis tool is further configured to apply each output current waveform to a given RC(L) network to calculate a second set of voltage output waveforms, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; wherein the timing analysis tool is further configured to select an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of output voltage waveforms at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of output voltage waveforms at the current time step for each time step in a series of time steps; and wherein the timing analysis tool is further configured to apply the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate. - View Dependent Claims (16, 17, 18, 19, 20, 21)
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Specification