Method and apparatus for determining gate-level delays in an integrated circuit

• US 7,043,709 B2
• Filed: 08/11/2003
• Issued: 05/09/2006
• Est. Priority Date: 08/11/2003
• Status: Active Grant

• Current Assignee: Synopsys Incorporated
• Original Assignee: Synopsys Incorporated
• Inventors: Levy, Harold J.
• Primary Examiner(s): Thompson, A. M.
• Assistant Examiner(s): Rossoshek, Helen
• Application Number:
  US10/639,085
• Publication Number:
  US 20050039151A1
• Time in Patent Office: 1,002 Days
• Field of Search: 716 4- 6, 716/9, 703/6, 703/19, 703 14- 16, 370/229, 327/108, 327/112, 327/141, 315/174
• US Class Current: 716/113
• CPC Class Codes: G06F 30/3312 Timing analysis

Abstract

A system is provided for determining voltage at the output of a gate in an integrated circuit. The system locates a gate within the integrated circuit and looks up a set of output current waveforms as a function of time for different effective capacitances at the gate'"'"'s output. The system applies each output current waveform to its corresponding effective capacitance to calculate a first set of output voltages and applies each output current waveform to a model of the net coupled to the output of the gate to calculate a second set of output voltages. For each time step in a series of time steps, the system selects an output current waveform for which a voltage in the first set of output voltage waveforms matches a voltage in the second set of output voltage waveforms. The system uses the selected output current waveform to determine the output voltage.

Claims

1. A method for determining a voltage at the output of a gate in an integrated circuit, comprising:

receiving a design for the integrated circuit;

locating a gate within the integrated circuit; and

looking up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate;

applying each output current waveform to its corresponding effective capacitance to calculate a first set of voltage waveforms voltages;

applying each output current waveform to a given RC(L) network to calculate a second set of voltage waveforms voltages, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; and

for each time step in a series of time steps,

selecting an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of voltage waveforms voltages at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of voltage waveforms voltages at the current time step, and

applying the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate.

2. The method of claim 1, wherein looking up an output current waveform may involve interpolating between a first output current waveform associated with a first input slew and a second output current waveform associated with a second input slew.

3. The method of claim 1, wherein if the given time step does not fall on a defined point on selected current waveform, applying the selected current waveform at the current time step may involve interpolating between a first point on the output current waveform and a second point on the output current waveform to establish an output current at the current time step.

4. The method of claim 1, further comprising interpolating between known points of parameters associated with the gate and output current waveforms, wherein interpolating can include multi-dimensional interpolation.

5. The method of claim 1, further comprising calculating an output parameter for the gate, wherein the output parameter can include on of a delay and a transition-time.

6. The method of claim 1, further comprising generating an output voltage waveform for the gate by assembling a series of present voltages associated with consecutive time steps.

7. The method of claim 1, wherein a lookup structure containing the output current waveforms includes output current waveforms for different gates as a function of input slew and effective capacitance.

8. A computer-readable storage medium storing instructions that when executed by a computer cause the computer to perform a method for determining a voltage at the output of a gate in an integrated circuit, the method comprising:

receiving a design for the integrated circuit;

locating a gate within the integrated circuit; and

looking up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate;

applying each output current waveform to its corresponding effective capacitance to calculate a first set of voltage waveforms voltages;

applying each output current waveform to a given RC(L) network to calculate a second set of voltage waveforms voltages, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate; and

for each time step in a series of time steps,

selecting an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of voltage waveforms voltages at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of voltage waveforms voltages at the current time step, and

applying the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate.

9. The computer-readable storage medium of claim 8, wherein looking up an output current waveform may involve interpolating between a first output current waveform associated with a first input slew and a second output current waveform associated with a second input slew.

10. The computer-readable storage medium of claim 8, wherein if the given time step does not fall on a defined point on selected current waveform, applying the selected current waveform at the current time step may involve interpolating between a first point on the output current waveform and a second point on the output current waveform to establish an output current at the current time step.

11. The computer-readable storage medium of claim 8, the method further comprising interpolating between known points of parameters associated with the gate and output current waveforms, wherein interpolating can include multi-dimensional interpolation.

12. The computer-readable storage medium of claim 8, the method further comprising calculating an output parameter for the gate, wherein the output parameter can include on of a delay and a transition-time.

13. The computer-readable storage medium of claim 12, the method further comprising generating an output voltage waveform for the gate by assembling a series of present voltages associated with consecutive time steps.

14. The computer-readable storage medium of claim 8, wherein a lookup structure containing the output current waveforms includes output current waveforms for different gates as a function of input slew and effective capacitance.

15. An apparatus for determining a voltage at the output of a gate in an integrated circuit, comprising:

a timing analysis tool configured to receive a design for the integrated circuit;

wherein the timing analysis tool is further configured to locate a gate within the integrated circuit;

wherein the timing analysis tool is further configured to look up in a library a set of output current waveforms for the gate assuming a given input slew, wherein each output current waveform specifies output current as a function of time for a different effective capacitance at the output of the gate;

wherein the timing analysis tool is further configured to apply each output current waveform to its corresponding effective capacitance to calculate a first set of output voltage waveforms;

wherein the timing analysis tool is further configured to apply each output current waveform to a given RC(L) network to calculate a second set of voltage output waveforms, wherein the given RC(L) network models RC(L) characteristics of a net coupled to the output of the gate;

wherein the timing analysis tool is further configured to select an output current waveform for which a voltage obtained by evaluating a corresponding waveform in the first set of output voltage waveforms at the current time step matches a voltage obtained by evaluating a corresponding waveform in the second set of output voltage waveforms at the current time step for each time step in a series of time steps; and

wherein the timing analysis tool is further configured to apply the selected output current waveform to the given RC(L) network to update a present voltage at the output of the gate.

16. The apparatus of claim 15, wherein looking up an output current waveform may involve interpolating between a first output current waveform associated with a first input slew and a second output current waveform associated with a second input slew.

17. The apparatus of claim 15, wherein if the given time step does not fall on a defined point on selected current waveform, applying the selected current waveform at the current time step may involve interpolating between a first point on the output current waveform and a second point on the output current waveform to establish an output current at the current time step.

18. The apparatus of claim 15, wherein the timing analysis tool is further configured to interpolate between known points of parameters associated with the gate and output current waveforms, wherein interpolating can include multi-dimensional interpolation.

19. The apparatus of claim 15, wherein the timing analysis tool is further configured to calculate an output parameter for the gate, wherein the output parameter can include on of a delay and a transition-time.

20. The apparatus of claim 19, wherein the timing analysis tool is further configured to generate an output voltage waveform for the gate by assembling a series of present voltages associated with consecutive time steps.

21. The apparatus of claim 15, wherein a lookup structure containing the output current waveforms includes output current waveforms for different gates as a function of input slew and effective capacitance.