Apparatus and method for forming a battery in an integrated circuit

• US 7,045,372 B2
• Filed: 08/02/2003
• Issued: 05/16/2006
• Est. Priority Date: 01/16/2001
• Status: Expired due to Term

• Current Assignee: Globalfoundries US Incorporated (GlobalFoundries, Inc.)
• Original Assignee: International Business Machines Corporation
• Inventors: Stamper, Anthony K., Nakos, James S., Ballantine, Arne W., Groves, Robert A., Rice, Michael B., Lund, Jennifer L.
• Primary Examiner(s): TSAI, H JEY
• Application Number:
  US10/632,652
• Publication Number:
  US 20040021201A1
• Time in Patent Office: 1,018 Days
• Field of Search: 438618-680, 438/19
• US Class Current: 438/19
• CPC Class Codes: H01L 23/522 including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
• CPC Class Codes: H01L 23/58 Structural electrical arrangements for semiconductor devices not otherwise provided for , e.g. in combination with batteries H01L23/49593, H01L23/49596 take precedence
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
• CPC Class Codes: H01M 10/052 Li-accumulators
• CPC Class Codes: H01M 10/0562 Solid materials
• CPC Class Codes: H01M 10/058 Construction or manufacture
• CPC Class Codes: H01M 10/425 Structural combination with electronic components, e.g. electronic circuits integrated to the outside of the casing printed circuits H05K1/00
• CPC Class Codes: H01M 4/5825 Oxygenated metallic salts or polyanionic structures, e.g. borates, phosphates, silicates, olivines
• CPC Class Codes: H01M 6/42 Grouping of primary cells into batteries H01M6/40 takes precedence
• CPC Class Codes: Y02E 60/10 Energy storage using batteries
• CPC Class Codes: Y02P 70/50 Manufacturing or production processes characterised by the final manufactured product

Abstract

A method and structure that provides a battery within an integrated circuit for providing voltage to low-current electronic devices that exist within the integrated circuit. The method includes Front-End-Of-Line (FEOL) processing for generating a layer of electronic devices on a semiconductor wafer, followed by Back-End-Of-Line (BEOL) integration for wires connecting the electronic devices together to form completed electrical circuits of the integrated circuit. The BEOL integration includes forming a multilayered structure of wiring levels on the layer of electronic devices. Each wiring level includes conductive metallization (e.g., metal-plated vias, conductive wiring lines, etc.) embedded in insulative material. The battery is formed during BEOL integration within one or more wiring levels, and the conductive metallization conductively couples positive and negative terminals of the battery to the electronic devices. The battery may have several different topologies relative to the structural and geometrical relationships among the battery electrodes and electrolyte. Multiple batteries may be formed within one or more wiring levels, and may be conductively coupled to the electronic devices. The multiple batteries may be connected in series or in parallel.

Claims

1. A method for forming an electrochemical structure within an integrated circuit, comprising the steps of:

providing a semiconductor wafer;

forming a layer of electronic devices on the semiconductor wafer, wherein the layer of electronic devices includes at least one electronic device;

forming N wiring levels within an interconnect structure of the integrated circuit, wherein the N wiring levels are disposed on the layer of electronic devices, wherein N is at least 2, wherein the N wiring levels are denoted as wiring level 1, wiring level 2, . . . , wiring level N in order of increasing distance from the semiconductor wafer;

forming a first conductive metallization and a second conductive metallization within the N wiring levels; and

forming at least one battery entirely within the wiring levels I through K, wherein I is selected from the group consisting of 1, 2, . . . , and N−

1, wherein K is selected from the group consisting of 1, 2, . . . , and N−

1, wherein I does not exceed K, wherein the first conductive metallization conductively couples a first electrode of the at least one battery to the at least one electronic device, and wherein the second conductive metallization conductively couples a second electrode of the battery to the at least one electronic device, and wherein the first and second conductive metallizations are totally external to the interior of the at least one battery.

2. The method of claim 1, wherein forming at least one battery includes forming a first battery, comprising:

forming an exposed insulating layer in the wiring level I and an exposed first conductive layer in the insulating layer;

forming an inter-level dielectric (ILD) layer over the exposed first conductive layer and over the exposed insulating layer;

forming a first trench within the ILD layer by removing a portion of the ILD layer, which exposes a portion of the first conductive layer;

conformally depositing an electrolyte layer over the ILD layer, over sidewalls of the first trench, and within the first trench over the first conductive layer, wherein a second trench is formed and is bounded by tho electrolyte layer;

depositing a second conductive material in the second trench and on the electrolyte layer, wherein the second conductive material overfills the second trench; and

polishing off top portions of the electrolyte layer and the second conductive material resulting in a planarized top surface of the electrolyte layer and the second conductive material, wherein a U-battery has been formed from the first conductive layer as the first electrode, the electrolyte layer as an electrolyte, and the second conductive material as the second electrode.

3. The method of claim 2, wherein the first electrode is selected from the group consisting of an anode and a cathode;

wherein if the first electrode is an anode, then the second electrode is a cathode, the first conductive layer includes an anode material, and the second conductive material includes a cathode material; and

wherein if the first electrode is a cathode, then the second electrode is an anode, the first conductive layer includes a cathode material, and the second conductive material includes an anode material.

4. The method of claim 3, wherein the anode material is selected from the group consisting of lithium, lithiated vanadium oxide (Li₈V₂O₅), AgI, Ag, and Zn, and wherein the cathode material is selected from the group consisting of V₂O₅, LiMn₂O₄, LiCoO₂, Sn, Pb, and Ag, and wherein an electrolyte of the first battery includes lithium phosphorous oxynitride.

5. The method of claim 2, wherein forming an ILD layer over the exposed first conductive layer and over the exposed insulating layer comprises:

forming an etch stop layer on the exposed first conductive layer and on the exposed insulating layer, and forming the ILD layer on the etch stop layer; and

wherein forming a first trench within the first ILD layer further comprises removing a portion of the etch stop layer to expose the portion of the first conductive layer.

6. The method of claim 2, further comprising after forming a first trench:

conformally depositing a conductive diffusion barrier film on the ILD layer, on sidewalls of the first trench, and on the exposed portion of the first conductive layer, and wherein the step of conformally depositing an electrolyte layer comprises depositing the electrolyte layer on the diffusion barrier.

7. The method of claim 2, further comprising after forming a first trench:

conformally depositing a diffusion barrier film on the ILD layer, on sidewalls of the first trench, and on the exposed portion of the first conductive layer; and

removing the diffusion barrier film that exists on the exposed portion of the first conductive layer, wherein the step of conformally depositing an electrolyte layer comprises depositing the electrolyte layer on the diffusion barrier film and within the first trench over the first conductive layer.

8. The method of claim 2, wherein forming a first conductive metallization and a second conductive metallization comprises:

forming a composite ILD layer on the planarized top surface; and

forming a composite trench within the composite ILD layer, which exposes a portion of the second conductive material; and

overfilling the composite trench with a third conductive material, wherein the third conductive material conductively contacts the second conductive material; and

polishing off a top portion of the third conductive material, which forms a planarized top surface of the third conductive material and which forms a conductive contact made of the third conductive material, wherein the first conductive metallization or the second conductive metallization includes the conductive contact.

9. The method of claim 1, wherein forming at least one battery includes forming a first battery, wherein forming a first battery, forming a first conductive metallization, and forming a second conductive metallization comprises:

forming an exposed insulating layer in the wiring level I and an exposed conductive plate in the insulating layer;

forming an inter-level dielectric (ILD) layer over the exposed conductive plate and over the exposed insulating layer;

forming a first trench within the ILD layer by removing a portion of the ILD layer, which exposes a portion of the first conductive plate;

conformally depositing a first conductive layer on the ILD layer, on sidewalls of the first trench, and on the exposed portion of the first conductive plate, wherein a second trench is formed and is bounded by the first conductive layer;

conformally depositing an electrolyte layer on the first conductive layer, wherein a third trench is formed and is bounded by the electrolyte layer;

depositing a second conductive material in the third trench and on the electrolyte layer, wherein the second conductive material overfills the third trench; and

polishing off top portions of the second conductive material, of the electrolyte layer, and of the first conductive layer, which results in a planarized top surface of the ILD layer, of the first conductive layer, of the electrolyte layer, and of the second conductive material, wherein a conductive contact is formed on the planarized top surface, wherein the conductive contact is in conductive contact with the second conductive material, wherein the first conductive metallization includes the conductive plate, and wherein the second conductive metallization includes the conductive contact, and wherein a U-battery With Double Extension has been formed from the first conductive layer as the first electrode, the electrolyte layer as an electrolyte, and the second conductive material as the second electrode.

10. The method of claim 9, wherein the first electrode is selected from the group consisting of an anode and a cathode;

wherein if the first electrode is an anode, then the second electrode is a cathode, the first conductive layer includes an anode material, and the second conductive material includes a cathode material; and

wherein if the first electrode is a cathode, then the second electrode is an anode, the first conductive layer includes a cathode material, and the second conductive material includes an anode material.

11. The method of claim 10, wherein the anode material is selected from the group consisting of lithium and lithiated vanadium oxide (Li₈V₂O₅), wherein the cathode material includes V₂O₅, and wherein the electrolyte layer includes lithium phosphorous oxynitride.

12. The method of claim 9, wherein forming an exposed insulating layer in the wiring level I and an exposed conductive plate in the dielectric layer comprises:

forming an etch stop layer on the exposed first conductive plate and on the exposed insulating layer, and forming the ILD layer on the etch stop layer; and

wherein forming a first trench within the ILD layer further comprises removing a portion of the etch stop layer to expose the portion of the first conductive plate.

13. The method of claim 1, wherein forming at least one battery includes forming a first battery, wherein forming a first battery, forming a first conductive metallization, and forming a second conductive metallization comprises:

forming an exposed insulating layer in the wiring level I and an exposed first conductive plate in the dielectric;

forming a first conductive layer on the insulating layer such that the first conductive layer is in conductive contact with the first conductive plate;

forming an electrolyte layer on the first conductive layer, wherein the electrolyte layer includes electrolyte materials; and

forming a second conductive layer on the electrolyte layer, wherein the second conductive layer includes a second conductive material, wherein the first conductive metallization includes the first conductive plate, and wherein a S-battery has been formed from the first conductive layer as the first electrode, the electrolyte layer as an electrolyte, and the second conductive layer as the second electrode.

14. The method of claim 13, wherein the first electrode is selected from the group consisting of an anode and a cathode;

wherein if the first electrode is an anode, then the second electrode is a cathode, the first conductive layer includes an anode material, and the second conductive layer includes a cathode material; and

wherein if the first electrode is a cathode, then the second electrode is an anode, the first conductive layer includes a cathode material, and the second conductive layer includes an anode material.

15. The method of claim 14, wherein the anode material is selected from the group consisting of lithium and lithiated vanadium oxide (Li₈V₂O₅), AgI, Ag and Zn, and wherein the cathode material is selected from the group consisting of V₂O₅, LiMn₂O₄, LiCoO₂, Sn, Pb and Ag, and wherein an electrolyte of the first battery includes lithium phosphorous oxynitride.

16. The method of claim 13, further comprising:

forming an inter-level dielectric (ILD) layer on the second conductive layer;

forming a trench within the ILD layer by removing a portion of the ILD layer, which exposes a portion of the second conductive layer;

overfilling the trench with a third conductive material; and

polishing off top portions of the third conductive material, which results in a planarized top surface of the ILD layer and of the third conductive material, wherein a second conductive plate is formed from the third conductive material on the planarized top surface, wherein the second conductive plate is in conductive contact with the second conductive layer, and wherein the second conductive metallization includes the second conductive plate.

17. The method of claim 1, wherein forming the at least one battery includes forming a plurality of batteries in series.

18. The method of claim 17, wherein the batteries in series consist of U-Batteries in series.

19. The method of claim 17, wherein the plurality of batteries includes M batteries denoted as batteries 1, 2, . . . , M, wherein M is at least 2, wherein each battery L is in series with battery L+1 and is conductively coupled to battery L+1 by a conductive interconnect, and wherein L=1, 2, . . . , M−

1.

20. The method of claim 17, wherein the plurality of batteries includes M batteries denoted as batteries 1, 2, . . . , M, wherein M is at least 2, wherein each battery L is in series with battery L+1 and is conductively coupled to battery L+1, wherein there is no conductive interconnect between battery L and battery L+1, and wherein L=1, 2, . . . , M−

1.

21. The method of claim 1, wherein forming the at least one battery includes forming a plurality of batteries in parallel.

22. The method of claim 1, wherein forming a first conductive metallization includes forming a first conductive contact that conductively contacts the first electrode, wherein forming a second conductive metallization includes forming a second conductive contact that conductively contacts the second electrode, wherein the first conductive contact is within the wiring levels I, I+1, . . . K, and wherein the second conductive contact is within the wiring levels I, I+1, . . . K.

23. The method of claim 22, wherein K=I.

24. The method of claim 1, wherein forming a first conductive metallization includes forming a first conductive contact that conductively contacts the first electrode, wherein forming a second conductive metallization includes forming a second conductive contact that conductively contacts the second electrode, wherein the first conductive contact is outside of the wiring levels I, I+1, . . . K, and wherein the second conductive contact is outside of the wiring levels I, I+1, . . . K.

25. The method of claim 1, wherein forming the at least one battery includes forming a first battery, wherein an anode of the first battery includes an anode material selected from the group consisting of lithium, lithiated vanadium oxide (Li₈V₂O₅), AgI, Ag, and Zn, and wherein a cathode of the first battery includes a cathode material selected from the group consisting of V₂O₅, LiMn₂O₄, LiCoO₂, Sn, Pb, and Ag, and wherein an electrolyte of the first battery includes lithium phosphorous oxynitride.

26. The method of claim 1, wherein forming the at least one battery includes forming a U-Battery.

27. The method of claim 26, wherein the U-Battery is a U-Battery With Double Extension.

28. The method of claim 1, wherein forming the at least one battery includes forming a S-Battery.

29. The method of claim 1, wherein the step of forming a layer of electronic devices includes forming the layer of electronic devices during a Front-End-Of-Line (FEOL) processing of the integrated circuit, wherein the step of forming N wiring levels includes forming the N wiring levels during a Back-End-Of-Line (BEOL) integration of the integrated circuit, wherein the step of forming a first conductive metallization and a second conductive metallization includes forming the first conductive metallization and the second conductive metallization during the BEOL integration of the integrated circuit, and wherein the step of forming at least one battery includes forming the at least one battery during the BEOL integration of the integrated circuit.

30. The method of claim 1, wherein a portion of the first conductive metallization or a portion of the second conductive metallization is within wiring level J such that J>

K.

31. The method of claim 1, wherein a first electrically conductive path from the first electrode to the at least one electronic device comprises the first conductive metallization arid is entirely within the N wiring levels, and wherein a second electrically conductive path from the second electrode to the at least one electronic device comprises the second conductive metallization and is entirely within the N wiring levels.

32. The method of claim 1, wherein K=I.

33. The method of claim 1, wherein N is at least 3, and wherein K is selected from the group consisting of I, 2+1, . . . , and N−

2.