Chip-on-chip connection with second chip located in rectangular open window hole in printed circuit board
First Claim
Patent Images
1. A method of forming a chip package for semiconductor chips including the steps as follows:
- forming a printed circuit board (PCB6) with an open window hole (W) therethrough, the printed circuit board (PCB6) having a length and a width and a top surface and a bottom surface and the open window hole (W) having a greater length than width, forming semiconductor chips including a primary chip (CH5) and a secondary chip (CH6), the primary chip (CH5) and the secondary chip (CH6) each having a length greater than the width of the open window hole (W), forming bonded connections (SB) between the top surface of the printed circuit board (PCB6) and the primary chip (CH5), with the primary chip (CH5) overlying the open window hole (W) and with the primary chip (CH5) extending transversely across the width of the open window hole (W), and locating the secondary chip (CH6) suspended within the open window hole (W) and forming bonded connections (SB) between the secondary semiconductor chip (CH6) and the primary chip (CH5) in a chip-on-chip connection.
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Abstract
A chip package for semiconductor chips is provided by the method of forming a chip package includes the steps of forming a printed circuit board with a window therethrough; forming semiconductor chip connections of one or more primary chips which overlie the window to the printed circuit board by solder connections, locating a suspended semiconductor chip within the window, and connecting the suspended semiconductor chip to one or more primary chips overlying the window in a chip-on-chip connection. A bypass capacitor is formed on the printed circuit board.
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Citations
8 Claims
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1. A method of forming a chip package for semiconductor chips including the steps as follows:
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forming a printed circuit board (PCB6) with an open window hole (W) therethrough, the printed circuit board (PCB6) having a length and a width and a top surface and a bottom surface and the open window hole (W) having a greater length than width, forming semiconductor chips including a primary chip (CH5) and a secondary chip (CH6), the primary chip (CH5) and the secondary chip (CH6) each having a length greater than the width of the open window hole (W), forming bonded connections (SB) between the top surface of the printed circuit board (PCB6) and the primary chip (CH5), with the primary chip (CH5) overlying the open window hole (W) and with the primary chip (CH5) extending transversely across the width of the open window hole (W), and locating the secondary chip (CH6) suspended within the open window hole (W) and forming bonded connections (SB) between the secondary semiconductor chip (CH6) and the primary chip (CH5) in a chip-on-chip connection. - View Dependent Claims (2, 3, 4)
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5. A chip package for semiconductor chips including:
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a printed circuit board (PCB6) with an open window hole (W) therethrough, the printed circuit board (PCB6) having a length and a width and a top surface and a bottom surface, semiconductor chips including a primary chip (CH5) and a secondary chip (CH6), the primary chip (CH5) and the secondary chip (CH6) each having a length greater than the width of the open window hole (W), bonded connections (SB) between the top surface of the printed circuit board (PCB6) and the primary chip (CH5), with the primary chip (CH5) overlying the open window hole (W) and with the primary chip (CH5) extending transversely across the width of the open window hole (W), the secondary chip (CH6) being suspended within the open window hole (W) and having bonded connections (SB) between the secondary semiconductor chip (CH6) and the primary chip (CH5) in a chip-on-chip connection. - View Dependent Claims (6, 7, 8)
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Specification