Data processing system having a serial data controller
First Claim
Patent Images
1. An apparatus comprising:
- at least three serial devices;
a serial data controller comprising;
at least three serial ports, each serial device being coupled to one of the serial ports and each serial port comprising timing and frame synchronization selector logic coupled to receive and transmit timing signals and frame synchronization signals for controlling timing and frame synchronization of a data transmission from any one of the at least three serial ports to another one of the at least three serial ports;
a plurality of data paths including at least a first data path and a second data path, each data path having a first end portion coupled to one of the serial ports and a second end portion coupled to another one of the serial ports, a first one of the serial ports being coupled to a second one of the serial ports via the first data path and to a third one of the serial ports via the second data path; and
control circuitry for dynamically selecting one or more of the data paths for transmission of serial data from a transmitting serial device to a selected subset of the serial devices and not to a deselected subset of the serial devices, wherein the data remains in a serial format throughout the transmission from the transmitting serial device to the selected serial devices.
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Abstract
A data processing system (30) includes two processors (70, 80) and a serial data controller (36) for selectively multiplexing serial data signals between one or more of a plurality of serial data devices (40, 42, 44, 46, 74, 76, 82) The serial data controller (36) includes one or more host ports (50, 52, 54) and one or more peripheral ports (56, 58, 60, 62) coupled together through a switching matrix (64). A control circuit (66) and a plurality of control registers (68) are used to configure and control a serial data path created between two or more ports including clock and frame synchronization timing of the data path.
16 Citations
30 Claims
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1. An apparatus comprising:
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at least three serial devices; a serial data controller comprising; at least three serial ports, each serial device being coupled to one of the serial ports and each serial port comprising timing and frame synchronization selector logic coupled to receive and transmit timing signals and frame synchronization signals for controlling timing and frame synchronization of a data transmission from any one of the at least three serial ports to another one of the at least three serial ports; a plurality of data paths including at least a first data path and a second data path, each data path having a first end portion coupled to one of the serial ports and a second end portion coupled to another one of the serial ports, a first one of the serial ports being coupled to a second one of the serial ports via the first data path and to a third one of the serial ports via the second data path; and control circuitry for dynamically selecting one or more of the data paths for transmission of serial data from a transmitting serial device to a selected subset of the serial devices and not to a deselected subset of the serial devices, wherein the data remains in a serial format throughout the transmission from the transmitting serial device to the selected serial devices. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13)
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14. In a system including at least three serial devices and a serial data controller, each serial device being coupled to each other serial device via a corresponding data path of the serial data controller, a method for communicating serial data, the method comprising:
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providing at least three serial ports, each serial device being coupled to one of the at least three serial ports; dynamically selecting one or more of the data paths for transmission of serial data from a transmitting serial port to a selected subset of the serial port; dynamically deselecting one or more of the data paths to prevent transmission of serial data from the transmitting serial port to a deselected subset of serial ports; providing timing and frame synchronization signals from any one of the at least three serial ports for clocking and synchronizing the transmission of serial data from the transmitting port to the selected serial ports; and transmitting the serial data from the transmitting serial port to the selected serial ports such that the serial data remains in a serial format throughout the transmission from the transmitting serial device to the selected serial devices. - View Dependent Claims (15, 27, 28, 29, 30)
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16. An apparatus comprising:
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at least three serial devices, each of the serial devices configured to transmit serial data at a corresponding clock rate, wherein at least two of the serial devices are configured to transmit at different clock rates; a serial data controller comprising; at least three serial ports, each serial device being coupled to one of the serial ports, each serial port for providing the serial data at the corresponding clock rate during a data transmission of the serial data; and a plurality of data paths, each data path having a first end portion coupled to one of the serial ports and a second end portion coupled to another one of the serial ports, wherein the serial data may be dynamically selectively transmitted from any of the serial devices to any other of the serial devices via a corresponding one of the data paths to the exclusion of deselected serial devices, wherein the data remains in a serial format throughout the transmission from the transmitting serial device to the receiving serial device. - View Dependent Claims (17, 18, 19, 20, 21, 22, 23)
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24. A special purpose audio information steering circuit comprising:
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a plurality of serial I/O ports, wherein each of the I/O ports is configured to couple to a corresponding serial device, and wherein each of the I/O ports is coupled to each of the other I/O ports via a point-to-point data path through which audio information may be transmitted from a first serial device to a second serial device each serial I/O port comprising timing and frame synchronization selector logic coupled to receive and transmit timing signals and frame synchronization signals for controlling timing and frame synchronization of an audio data transmission from any one of the plurality of serial I/O ports to another one of the plurality of serial I/O parts; and control circuitry for dynamically selecting one or more of the data paths for transmission of audio data from an I/O port receiving audio data to a selected subset of the I/O ports and not to a deselected subset of the I/O ports, wherein the audio data remains in a serial format throughout the transmission from the receiving I/O port to the selected I/O ports.
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25. A special purpose audio information steering circuit comprising:
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a plurality of serial ports, the plurality of serial ports including N host ports configured to receive data from multiple serial sources in a TDM network mode, each of the N host serial ports comprising timing and frame synchronization selector logic coupled to receive and transmit timing signals and frame synchronization signals for controlling timing and frame synchronization of a data transmission from any of the plurality of serial ports; and M peripheral ports configured to receive data from a single selectable serial source, each of the M peripheral ports comprising timing and frame synchronization selector logic coupled to receive and transmit timing signals and frame synchronization signals for controlling timing and frame synchronization of a data transmission from any of the plurality of serial ports; a software configurable serial interface block coupled to each of the host ports and the peripheral ports, the interface block including M×
N data paths, each data path being coupled between a host and a peripheral; andcontrol registers for storing control information to dynamically select one or more of the data paths for transmission of audio data from a first selected subset of the serial ports to a second selected subset of the serial ports and not to a deselected subset of the serial ports, wherein the audio data remains in a serial format throughout the transmission from the first subset of serial ports to the second subset of serial ports. - View Dependent Claims (26)
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Specification