Storage controller with the disk drive and the RAM in a hybrid architecture

• US 7,047,356 B2
• Filed: 05/06/2003
• Issued: 05/16/2006
• Est. Priority Date: 10/30/2000
• Status: Expired due to Fees

• Current Assignee: Jack Yajie Chen
• Original Assignee: Jack Yajie Chen
• Inventors: Chen, Jack Yajie
• Primary Examiner(s): BATAILLE, PIERRE MICHE
• Application Number:
  US10/431,301
• Publication Number:
  US 20030196031A1
• Time in Patent Office: 1,106 Days
• Field of Search: 711/104, 711/111, 711/112, 711/161, 711/162, 711/170, 711/103, 711/154, 711/113, 360/69, 714 6- 22, 714/24, 713/340, 713/300, 713/320, 365/229
• US Class Current: 711/113
• CPC Class Codes: G06F 12/0873 Mapping of cache memory to specific storage devices or parts thereof
• CPC Class Codes: G06F 2212/281 Single cache
• CPC Class Codes: G06F 2212/312 In storage controller

Abstract

A method to combine disk drive'"'"'s inexpensive large capacity and RAM'"'"'s fast access speed to accelerate computer system'"'"'s booting speed and application execution speed. Some of the most recently used data will be permanently stored in a large RAM storage with a power source. A controller unit is designed to manage the interface between the RAM storage, disk drive and the computer storage device interface.

Claims

1. A storage assembly comprising:

a hard disk drive;

a processing assembly connected to said hard disk drive comprising a power source, a controller, and random access memory, said controller interconnecting said random access memory and said hard disk drive, said power source being connected to said hard disk drive, said controller, and said random access memory, wherein said processing assembly is adapted to receive data from a computer system; and

wherein said controller manages the data flowing between the computer system, said random access memory, and said hard disk drive, said controller causing the received data to be placed only within said random access memory such that said random access memory contains stored data blocks, said controller continuously monitoring usage of the data resident within said random access memory, said controller accessing said hard disk drive only if a data block that the computer system requests is not in said random access memory and backing-up a data block to said hard disk drive only when the data block has not been accessed from said random access memory for a period of time.

2. A method of storing data, said method comprising the steps of:

providing a hard disk drive;

providing a processing assembly having a controller and a random access memory and connecting the processing assembly to the hard disk drive;

receiving data from a computer system by the processing assembly and placing the data by the controller only within the random access memory such that the random access memory contains stored data blocks;

continuously monitoring the usage of the data which is resident within the random access memory;

accessing the hard disk drive only if a data block that computer system requests is not in the random access memory; and

backing-up a data block to the hard disk drive only when the data block has not been accessed from the random access memory for a period of time.

3. A method of storing data, said method comprising the steps of:

providing a hard disk drive;

providing a processing assembly having a power source, a controller, and random access memory;

connecting the controller to the hard disk drive and the random access memory;

connecting the power source to the hard disk drive, the controller, and the random access memory;

receiving data from a computer system by the controller and placing the data by the controller only within the random access memory such that the random access memory contains stored data blocks;

continuously monitoring the usage of the data which is resident within the random access memory;

accessing the hard disk drive only if a data block that computer system requests is not in the random access memory; and

backing-up a data block to the hard disk drive only when the data block has not been accessed from the random access memory for a period of time.