Method of making heterojunction P-I-N diode

• US 7,049,181 B2
• Filed: 08/10/2004
• Issued: 05/23/2006
• Est. Priority Date: 05/03/2002
• Status: Expired due to Term

• Current Assignee: MACOM Technology Solutions Holdings, Inc.
• Original Assignee: M/A Com
• Inventors: Brogle, James Joseph, Boles, Timothy Edward, Hoag, David Russell
• Primary Examiner(s): Prenty, Mark V.
• Application Number:
  US10/915,579
• Publication Number:
  US 20050006729A1
• Time in Patent Office: 651 Days
• Field of Search: 438/133, 438/761, 257/656
• US Class Current: 438/133
• CPC Class Codes: H01L 29/0657 characterised by the shape of the body
• CPC Class Codes: H01L 29/20 including, apart from doping materials or other impurities, only AIIIBV compounds
• CPC Class Codes: H01L 29/868 PIN diodes
• CPC Class Codes: Y02E 10/548 Amorphous silicon PV cells

Abstract

A heterojunction P-I-N diode switch comprises a first layer of doped semiconductor material of a first doping type, a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween, creating an energy barrier in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P-I-N diode and the insertion loss relative to that of homojunction P-I-N diodes.

Claims

1. A method of forming a heterojunction P-I-N diode switch comprising:

forming a semi-insulating substrate;

forming on the substrate a first layer of doped semiconductor material of a first doping type to form a cathode layer;

forming an intrinsic layer of semiconductor material on the first layer; and

forming a second layer of doped semiconductor material of a second doping type on the intrinsic layer to form an anode layer,

wherein at least one of the first layer and second layer is formed of semiconductor material different from that of the intrinsic layer to create a heterojunction therebetween, thereby providing an energy barrier;

whereby a heterojunction P-I-N diode switch is formed.

2. The method of claim 1, wherein the first layer, second layer and intrinsic layer are formed at a same temperature.

3. The method of claim 2, wherein the same temperature is between 600 and 700 degrees celsius.

4. The method of claim 2, wherein the same temperature is approximately 650 degrees celsius.

5. The method of claim 1, wherein the step of forming the cathode layer comprises epitaxially growing on the substrate a first layer of n-type GaAs.

6. The method of claim 1, wherein the step of forming the anode layer comprises epitaxially growing on the intrinsic layer a second layer of p-type AlGaAs.

7. The method of claim 1, wherein at least one of the first layer and second layer of doped semiconductor materials has an energy bandgap greater than an energy bandgap of the intrinsic layer.