Method and apparatus for reducing power consumption of a decoder in a communication system

• US 7,051,268 B1
• Filed: 09/29/2000
• Issued: 05/23/2006
• Est. Priority Date: 09/29/2000
• Status: Expired due to Term

• Current Assignee: Qualcomm, Inc.
• Original Assignee: Qualcomm, Inc.
• Inventors: Black, Peter J., Sindhushayana, Nagabhushana T.
• Primary Examiner(s): Decady, Albert
• Assistant Examiner(s): ABRAHAM, ESAW T
• Application Number:
  US09/675,704
• Time in Patent Office: 2,062 Days
• Field of Search: 714/786, 714/752, 714/797, 714/799, 375/317, 375/299, 341/126
• US Class Current: 714/786
• CPC Class Codes: H04L 1/0045 Arrangements at the receiver end
• CPC Class Codes: H04L 1/0051 Stopping criteria
• CPC Class Codes: H04W 52/0245 according to signal strength
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

A method and an apparatus for reducing power consumption of a decoder in a communication system are disclosed. In a communication system communicating a packet, the packet can be arranged among slots of a communication channel so that each slot following the first slot contains redundant bits of the packet with respect to the first slot. A receiving station estimates quality metric of a received slot, determines a quality metric threshold, and delimits an interval in accordance with the modified quality metric threshold. If the estimated quality metric is outside of the interval, the segment is decoded. The decoding process comprises delimiting a plurality of intervals in accordance with the quality metric threshold, associating each of the plurality of intervals with one of a plurality of parameters, determining an interval from the plurality of intervals into which the estimated quality metric belongs; and decoding the received signal for a number of iterations equal to the one of a plurality of parameters associated with the determined interval. In the course of the decoding process, a stopping criterion is evaluated, and the decoding process is terminated in accordance with the stopping criterion.

Claims

1. A method for reducing power consumption of a decoder in a communication system, comprising:

estimating a quality metric of a channel associated with a segment of a received signal;

determining a quality metric threshold;

determining a real-valued parameter Δ

₀;

defining an interval in accordance with a formula (−

∞

, TS+Δ

₀), where TS is the quality metric threshold; and

decoding the segment when the estimated quality metric is outside of the interval.

2. The method of claim 1 wherein the estimating a quality metric comprises estimating a signal-to-noise ratio.

3. The method of claim 1 wherein the estimating a quality metric of a channel associated with a segment of a received signal comprises estimating a quality metric of a channel associated with a slot of a received signal.

4. The method of claim 1 wherein the determining a quality metric threshold comprises:

determining a data rate of the segment;

determining a number of segments received; and

determining a quality metric threshold in accordance with the data rate and the number of segments.

5. The method of claim 1 further comprising determining the parameter Δ

₀ in accordance with a demodulator performance.

6. The method of claim 1 wherein the parameter Δ

₀ is less than or equal to zero.

7. The method of claim 1 wherein the quality metric is slot based.

8. A method for reducing power consumption of a decoder in a communication system, comprising:

estimating a quality metric of a channel associated with a segment of a received signal;

determining a quality metric threshold;

delimiting a plurality of intervals in accordance with the quality metric threshold;

associating each of the plurality of intervals with one of a plurality of parameters;

determining an interval from the plurality of intervals into which the estimated quality metric belongs; and

decoding the received signal for a number of iterations equal to the one of a plurality of parameters associated with the determined interval.

9. The method of claim 8 wherein the delimiting a plurality of intervals comprises:

determining a plurality of real-valued parameters

Δ

₀≦

Δ

₁≦

. . . ≦

Δ

_m≦

0<

Δ

_m+1, ≦

Δ

_m+2≦

. . . Δ

_m+n; and

defining the plurality of intervals in accordance with the formulas;

[TS+Δ

_k-1, TS+Δ

_k], for all kε

(1, n+m); and

[TS+Δ

_n+m, ∞

],

where n, m are non-negative, integer-valued parameters, and TS is the quality metric threshold.

10. The method of claim 9 wherein the parameters Δ

₁, . . . , Δ

_m, Δ

_m+1, Δ

_m+2, . . . Δ

_m+n are determined in accordance with a demodulator performance.

11. The method of claim 8 wherein the plurality of parameters comprise non-negative, integer-valued parameters N₁≦

. . . ≦

N_m≧

N_m+1≧

N_m+2≧

. . . N_n+m+1.

12. The method of claim 11 wherein the parameters N₁, . . . , N_m, N_m+1, N_m+2, . . . N_n+m+1 are determined in accordance with a demodulator performance.

13. An apparatus for reducing power consumption of a decoder in a communication system, comprising:

a processor; and

a processor-readable storage medium accessible by the processor and containing a set of instructions for execution by the processor to;

estimate a quality metric of a channel associated with a segment of a received signal;

determine a quality metric threshold;

determine a real-valued parameter Δ

₀;

define an interval in accordance with a formula (−

∞

, TS+Δ

₀), where TS is the quality metric threshold; and

decode the segment when the estimated quality metric is outside of the interval.

14. The apparatus of claim 13 wherein the quality metric is a signal-to-noise ratio.

15. The apparatus of claim 13 wherein the segment of a received signal is a slot.

16. The apparatus of claim 13 wherein the quality metric threshold is determined in accordance with a data rate of the segment and a number of segments received.

17. The apparatus of claim 13 wherein the parameter Δ

₀ is determined in accordance with a demodulator performance.

18. The apparatus of claim 13 wherein the parameter Δ

₀ is less than or equal to zero.

19. The apparatus of claim 13 wherein the quality metric is slot based.

20. An apparatus for reducing power consumption of a decoder in a communication system, comprising:

a processor; and

a processor-readable storage medium accessible by the processor and containing a set of instructions for execution by the processor to;

estimate a quality metric of a channel associated with a segment of a received signal;

determine a quality metric threshold;

delimit a plurality of intervals in accordance with the quality metric threshold;

associate each of the plurality of intervals with one of a plurality of parameters;

determine an interval from the plurality of intervals into which the estimated quality metric belongs; and

decode the received signal for a number of iterations equal to the one of a plurality of parameters associated with the determined interval.

21. The apparatus of claim 20 wherein the set of instructions is further for execution by the processor to delimit a plurality of intervals by:

determining a plurality of real-valued parameters

Δ

₀≦

Δ

₁≦

. . . ≦

Δ

_m≦

0<

Δ

_m+1≦

Δ

_m+2≦

. . . Δ

_m+n; and

defining the plurality of intervals in accordance with the formulas;

[TS+Δ

_k-1, TS+Δ

_k], for all kε

(1, n+m); and

[TS+Δ

_n+m, ∞

],

where n, m are non-negative, integer-valued parameters, and TS is the quality metric threshold.

22. The apparatus of claim 21 wherein the parameters Δ

₁, . . . , Δ

_m, Δ

_m+1, Δ

_m+2, . . . Δ

_m+n are determined in accordance with a demodulator performance.

23. The apparatus of claim 20 wherein a plurality of parameters comprise non negative, integer-valued parameters N₁≦

. . . ≦

N_m≧

N_m+1≧

N_m+2≧

. . . N_n+m+1.

24. The apparatus of claim 23 wherein the parameters N₁, . . . , N_m, N_m+1, N_m+2, . . . N_n+m+1 are determined in accordance with a demodulator performance.

25. The apparatus of claim 20 wherein the quality metric comprises a signal-to-noise ratio.

26. The apparatus of claim 20 wherein the quality metric threshold is determined in accordance with a data rate of the segment and a number of segments received.

27. A processor-readable medium for reducing power consumption of a decoder in a communication system, comprising instructions for execution by a processor to:

estimate a quality metric of a channel associated with a segment of a received signal;

determine a quality metric threshold;

determine a real-valued parameter Δ

₀;

define an interval in accordance with a formula (−

∞

, TS+Δ

₀), where TS is the quality metric threshold; and

decode the segment when the estimated quality metric is outside of the interval.

28. The processor-readable medium of claim 27 wherein the quality metric is a signal-to-noise ratio.

29. The processor-readable medium of claim 27 wherein the segment of a received signal is a slot.

30. The processor-readable medium of claim 27 wherein the quality metric threshold is determined in accordance with a data rate of the segment and a number of segments received.

31. The processor-readable medium of claim 27 wherein the parameter Δ

₀ is determined in accordance with a demodulator performance.

32. The processor-readable medium of claim 27 wherein the parameter Δ

₀ is less than or equal to zero.

33. The processor-readable medium of claim 27 wherein the quality metric is slot based.

34. A processor-readable medium for reducing power consumption of a decoder in a communication system, comprising instructions for execution by a processor to:

estimate a quality metric of a channel associated with a segment of a received signal;

determine a quality metric threshold;

delimit a plurality of intervals in accordance with the quality metric threshold;

associate each of the plurality of intervals with one of a plurality of parameters;

determine an interval from the plurality of intervals into which the estimated quality metric belongs; and

decode the received signal for a number of iterations equal to the one of a plurality of parameters associated with the determined interval.

35. The processor-readable medium of claim 34 wherein the set of instructions is further for execution by the processor to delimit a plurality of intervals by:

determining a plurality of real-valued parameters

Δ

₀≦

Δ

₁≦

. . . ≦

Δ

_m≦

0<

Δ

_m+1≦

Δ

_m+2≦

. . . Δ

_m+n; and

defining the plurality of intervals in accordance with the formulas;

[TS+Δ

_k-1, TS+Δ

_k], for all kε

(1, n+m); and

[TS+Δ

_n+m, ∞

],

where n, m are non-negative, integer-valued parameters, and TS is the quality metric threshold.

36. The processor-readable medium of claim 35 wherein the parameters Δ

_l, . . . , Δ

_m, Δ

_m+1, Δ

_m+2, . . . Δ

_m+n are determined in accordance with a demodulator performance.

37. The processor-readable medium of claim 34 wherein a plurality of parameters comprise non-negative, integer-valued parameters N₁≦

. . . ≦

N_m≧

N_m+1≧

N_m+2≧

. . . N_n+m+1.

38. The processor-readable medium of claim 37 wherein the parameters N₁, . . . , N_m, N_m+1, N_m+2, . . . N_n+m+1 are determined in accordance with a demodulator performance.

39. The processor-readable medium of claim 34 wherein the quality metric comprises a signal-to-noise ratio.

40. The processor-readable medium of claim 34 wherein the quality metric threshold is determined in accordance with a data rate of the segment and a number of segments received.