Method and apparatus for creating an extraction model

• US 7,051,293 B1
• Filed: 01/31/2002
• Issued: 05/23/2006
• Est. Priority Date: 08/28/2001
• Status: Expired due to Fees

• Current Assignee: Cadence Design Solutions, Inc.
• Original Assignee: Cadence Design Systems Incorporated (Cadence Group)
• Inventors: Teig, Steven, Chatterjee, Arindam
• Primary Examiner(s): WHITMORE, STACY
• Application Number:
  US10/061,945
• Time in Patent Office: 1,573 Days
• Field of Search: 716 5- 7, 716/1, 716/2, 716/18
• US Class Current: 716/113
• CPC Class Codes: G06F 30/39 Circuit design at the physical level physical level design for reconfigurable circuits G06F30/347
• CPC Class Codes: G06F 30/398 Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] optical proximity correction [OPC] design processes G03F1/36

Abstract

A system for using machine-learning to create a model for performing integrated circuit layout extraction is disclosed. The system of the present invention has two main phases: model creation and model application. The model creation phase comprises creating one or more extraction models using machine-learning techniques. First, a complex extraction problem is decomposed into smaller simpler extraction problems. Then, each smaller extraction problem is then analyzed to identify a set of physical parameters that fully define the smaller extraction problem. Next, models are created using machine learning techniques for all of the smaller simpler extraction problems. The machine learning is performed by first creating training data sets composed of the identified parameters from typical examples of the smaller extraction problem and the answers to those example extraction problems as solved using a highly accurate physics-based field solver. The training sets are then used to train the models. In one embodiment, neural networks are used to model the extraction problems. To train the neural network models. Bayesian inference is used in one embodiment. Bayesian inference may be implemented with normal Monte Carlo techniques or Hybrid Monte Carlo techniques. After the creation of a set of models for each of the smaller simpler extraction problems, the machine-learning based models may be used for extraction.

Claims

1. A method of constructing a model for estimating electrical characteristics for an extraction sub problem, said method comprising:

identifying a set of physical measurements that define said extraction sub problem;

selecting a set of training cases for said specific extraction sub problem, each of said training cases including an associated set of said physical measurements;

solving said specific extraction sub problem for each of said training cases using said associated set of physical measurements as an input to an accurate physics based model to generate an associated output; and

training a neural network using said associated set of physical measurements and associated outputs as training data.

2. The method as claimed in claim 1 wherein said electrical characteristic comprises capacitance.

3. The method as claimed in claim 1 wherein said electrical characteristic comprises resistance.

4. The method as claimed in claim 1 wherein said extraction sub problem comprises a section of interconnect wire and nearby interconnect wiring within a define halo.

5. The method as claimed in claim 1 wherein said extraction sub problem comprises a section of interconnect wiring.

6. The method as claimed in claim 1 wherein one of said set of physical parameters comprises a spacing between a pair of interconnect lines.

7. The method as claimed in claim 1 wherein one of said set of physical parameters comprises a wire width.

8. The method as claimed in claim 1 wherein one of said set of physical parameters comprises a wire length.

9. The method as claimed in claim 1 wherein selecting a set of training cases comprises randomly generating input parameters with a gamma probability distribution.

10. The method as claimed in claim 1 wherein said electrical characteristic comprises delay.