Alignment method for fabrication of integrated ultrasonic transducer array

• US 7,052,464 B2
• Filed: 01/01/2004
• Issued: 05/30/2006
• Est. Priority Date: 01/01/2004
• Status: Expired due to Fees

• Current Assignee: General Electric Company
• Original Assignee: General Electric Company
• Inventors: Wodnicki, Robert G.
• Primary Examiner(s): Vu, David
• Application Number:
  US10/751,290
• Publication Number:
  US 20050148132A1
• Time in Patent Office: 880 Days
• Field of Search: 600/140, 600/170, 600/180, 600/437, 600/459, 600/460, 367/140, 367/162, 367/173, 367/174, 367/170, 367/178, 367180-182, 29/253.5
• US Class Current: 600/459
• CPC Class Codes: B06B 1/0292 Electrostatic transducers, e.g. electret-type
• CPC Class Codes: Y10T 29/42 Piezoelectric device making

Abstract

An integrated circuit is fabricated by micromachining a hexagonal array of cMUT elements on top of a substrate comprising a hexagonal array of CMOS cells. Each cMUT element overlies a respective CMOS cell in one-to-one correspondence. During layout of the mask for micromachining the cMUT layer, either the hexagonal pattern or the alignment key is rotated until an axis of symmetry of the hexagonal pattern is aligned with an axis of the alignment key. Later, when the mask is superimposed on the CMOS substrate, the alignment key on the mask is aligned with an alignment key on the substrate. This ensures that the cMUT elements formed by optical lithography will be matched to the CMOS cells.

Claims

1. An alignment method comprising the following steps:

laying out a pattern representing a hexagonal arrangement of cMUT elements having axes of symmetry, said laid-out pattern comprising a first set of graphical data;

processing said first set of graphical data to rotate said pattern by a predetermined angle relative to a fixed rectilinear frame of reference having two mutually orthogonal axes, said predetermined angle being selected so that an axis of symmetry of said hexagonal arrangement of hexagonal cMUT elements is aligned with an axis of a first fixed rectilinear frame of reference;

laying out a first alignment key having an axis aligned with an axis of said fixed first rectilinear frame of reference, said laid-out alignment key comprising a second set of graphical data;

transferring said rotated pattern and said first alignment key to a mask; and

placing said mask over a substrate comprising a hexagonal arrangement of CMOS cells having axes of symmetry respectively aligned with the axes of a second fixed rectilinear frame of reference, and a second alignment key having an axis aligned with an axis of said second fixed rectilinear frame of reference, said mask being placed so that said first alignment key is aligned with said second alignment key.

2. The method as recited in claim 1, wherein each of said cMUT elements is hexagonal and each of said CMOS cells is rectangular.

3. An alignment method comprising the following steps:

laying out a pattern representing a hexagonal arrangement of cMUT elements having axes of symmetry, said laid-out pattern comprising a first set of graphical data;

laying out a first alignment key having an axis, said laid-out alignment key comprising a second set of graphical data;

processing said second set of graphical data to rotate said first alignment key by a predetermined angle relative to said axes of symmetry, said predetermined angle being selected so that said axis of said first alignment key is aligned with one of said axes of symmetry of said hexagonal arrangement of hexagonal cMUT elements;

transferring said pattern and said rotated first alignment key to a mask; and

placing said mask over a substrate comprising a hexagonal arrangement of CMOS cells having orthogonal axes of symmetry respectively aligned with the axes of a second fixed rectilinear frame of reference, and a second alignment key having an axis aligned with an axis of said second fixed rectilinear frame of reference, said mask being placed so that said first alignment key is aligned with said second alignment key.

4. The method as recited in claim 3, wherein each of said cMUT elements is hexagonal and each of said CMOS cells is rectangular.