Method for producing a spiral inductance on a substrate, and a device fabricated according to such a method

• US 7,053,747 B2
• Filed: 05/05/2005
• Issued: 05/30/2006
• Est. Priority Date: 05/05/2004
• Status: Active Grant

• Current Assignee: Atmel Corporation (Microchip Technology Incorporated)
• Original Assignee: Atmel Germany GmbH (Microchip Technology Incorporated)
• Inventors: Joodaki, Mojtaba
• Primary Examiner(s): Nguyen, Tuyen T
• Application Number:
  US11/122,057
• Publication Number:
  US 20050248431A1
• Time in Patent Office: 390 Days
• Field of Search: 336/83, 336/200, 336/232, 257/531, 257/622, 438/381, 438/700
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0006 Printed inductances printed coils for dynamo-electric machines H02K3/26; printed circuits H05K
• CPC Class Codes: H01F 2017/0046 with a conductive path having a bridge
• CPC Class Codes: H01F 2017/008 Electric or magnetic shielding of printed inductances
• CPC Class Codes: H01F 41/041 Printed circuit coils apparatus or processes for manufacturing printed circuits in general H05K3/00
• CPC Class Codes: H01L 21/764 Air gaps H01L21/76264 takes precedence
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 27/08 including only semiconductor components of a single kind
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

A device and a method for producing such a device is provided, whereby the windings of a spiral inductance are embedded in a membrane such that they are freely suspended over a completely back-etched area of the substrate for a decoupling of the windings from the substrate. An additional substrate is connected to the bottom side of the back-etched area of the processed substrate such that a hollow cavity is formed for a decoupling of the windings from the substrate.

Claims

1. A method for fabricating a spiral inductance on a substrate, the method comprising the steps of:

forming a structured inductance metallization and a structured upper ground metallization on an upper surface of the substrate;

forming a first insulating layer at least between the inductance metallization and the upper ground metallization and over the inductance metallization;

back-etching of an area of the substrate below the inductance metallization such that at least a portion of the windings of the inductance metallization are embedded in the insulating layer for support and are suspended over the completely back-etched area of the substrate; and

structured metallization of the surface of the back-etched area of the substrate for forming an end-to-end-connected ground point, and of the segments of the inductance metallization located above the back-etched area for forming thickened windings of the spiral inductance.

2. The method according to claim 1, wherein a second insulating layer, is formed on the upper surface of the substrate prior to the application of the metallizations.

3. The method according to claim 1, wherein the back-etching of the area of the substrate below the inductance metallization is performed in two consecutive substrate etching steps, wherein, in a first etching step, an area of the substrate below the inductance metallization is partially back-etched for forming a thin substrate layer, and wherein, in a subsequent second etching step, a segment of the thin substrate layer below the inductance metallization is back-etched for forming a staggered structure of the back-etched area of the substrate.

4. The method according to claim 3, wherein the first etching step is a wet chemical etching process.

5. The method according to claim 3, wherein the second etching step includes a deposition of a further insulating layer on a lower surface of the substrate and on a surface of the partially back-etched segment, and a structuring of the further insulating layer is performed by developing a vapor-deposited photoresist for a structured anisotropic back-etching of a segment of the thin substrate layer.

6. The method according to claim 5, wherein the photoresist is subsequently removed.

7. The method according to claim 6, wherein the remaining further insulating layer is removed by using a dry etching procedure prior to the application of the photoresist for structured metallization.

8. The method according to claim 2, wherein the additional step of removing the second insulating layer in the segment of the back-etched area of the substrate is performed by using a dry etching procedure prior to the application of the photoresist for the structured metallization.

9. The method according to claim 1, wherein, due to the structured metallization, a lower ground metallization is formed, which is respectively connected with one of the segments of the upper ground metallization, the segments being located above the back-etched area of the substrate.

10. The method according to claim 1, wherein an additional substrate is attached to a lower surface of the substrate for forming a hollow cavity between the additional substrate and the lower surface of the substrate.

11. The method according to claim 10, wherein the additional substrate is formed with a metallization on a surface thereof, which is at least partially connected with the lower ground metallization.

12. The method according to claim 10, wherein the additional substrate is formed such that it can be, at least in part, formclosed inserted in the partially back-etched area.

13. The method according to claim 1, wherein prior to the structured metallization, a photoresist layer is formed on the surface of the back-etched area of the substrate and radiated.

14. The method according to claim 1, wherein the first insulating layer is provided with bridgeover openings for bridging at least one connection of the spiral inductance.

15. The method according to claim 14, wherein a bridgeover metallization is formed between the bridgeover openings.

16. The method according to claim 1, wherein a covering metallization is formed over the inductance metallization by a photoresist layer, which is applied in the shape of a lid to the upper ground metallization.

17. The method according to claim 1, wherein a plurality of spiral inductances are provided, adjacent to one another, on the substrate, and wherein the substrate is subjected to collective substrate etching steps for forming respective back-etched areas below each of the spiral inductances.

18. The method according to claim 1, wherein the substrate is a silicon semiconductor substrate.

19. The method according to claim 2, wherein the second insulating layer is made of a dielectric inorganic insulation material, a silicon oxide, a silicon dioxide, silicon with air gaps, or silicon nitride.

20. The method according to claim 1, wherein the insulating layer is a dielectric membrane that is made of an organic insulation material, an organic polymer material, benzocyclobutene (BCB), SU-8, SiLK, or a polyimide.

21. The method according to claim 1, wherein the metallizations are made of aluminum, copper, silver, gold, or titanium.

34. The method according to claim 2, wherein the second insulating layer is a dielectric insulating layer.

22. A device comprising:

a substrate having a back-etched area on a lower surface thereof;

a first insulating layer, which is provided above the substrate and which completely covers the back-etched area;

an upper structured ground metallization;

at least one structured inductance metallization having windings, which are suspended over the back-etched area of the substrate by being embedded in the first insulating layer, for decoupling the structure inductance metallization from the substrate; and

a lower metallization formed on a surface of the back-etched area of the substrate, the lower metallization being applied from a bottom side of the substrate, for forming an end-to-end ground connection, and, on the segments of the spiral inductance that are located above the back-etched areas, for forming thickened windings of the spiral inductance.

23. The device according to claim 22, wherein an additional substrate is attached to the lower surface of the substrate for forming a hollow cavity between the additional substrate and the lower surface of the substrate.

24. The device according to claim 23, wherein the additional substrate has a metallization on a surface thereof, which is at least partially connectable to the lower metallization.

25. The device according to claim 23, wherein the additional substrate is formed so that it can be at least partially formclosed inserted in the back-etched areas.

26. The device according to claim 22, wherein bridgeover openings are provided in the first insulating layer for bridging at least one connection of the spiral inductance.

27. The device according to claim 26, wherein the bridgeover metallization is provided in between bridgeover openings.

28. The device according to claim 22, wherein a covering metallization is formed over the spiral inductance by a photoresist layer, which is attached to the upper ground metallization in the shape of a lid.

29. The device according to claim 22, wherein a plurality of spiral inductances are provided adjacent to one another on the substrate, and wherein the substrate is subjected to collective substrate etching steps for forming each of the back-etched areas below the respective spiral inductance.

30. The device according to claim 22, wherein the substrate is a silicon semiconductor substrate.

31. The device according to claim 22, wherein the insulating layer is made of a dielectric inorganic insulation material, a silicon oxide, a silicon dioxide, a silicon nitride, or silicon with buried air gaps.

32. The device according to claim 22, wherein the insulating layer is a membrane that is made of a dielectric organic insulation material, an organic polymer material, benzocyclobutene (BCB), SU-8, SiLK, or a polyimide.

33. The device according to claim 22, wherein the metallizations are made of aluminum, copper silver, gold, or titanium.