Embedded integrated circuit aging sensor system

• US 7,054,787 B2
• Filed: 01/23/2003
• Issued: 05/30/2006
• Est. Priority Date: 01/23/2003
• Status: Active Grant

• Current Assignee: Oracle America, Inc. (Oracle Corporation)
• Original Assignee: Sun Microsystems Incorporated (Oracle Corporation)
• Inventors: Trivedi, Pradeep R., Yee, Gin S., Gauthier, Claude R.
• Primary Examiner(s): Hoff, Marc S.
• Assistant Examiner(s): O MALLEY, MARY CATHERINE
• Application Number:
  US10/349,854
• Publication Number:
  US 20040148111A1
• Time in Patent Office: 1,223 Days
• Field of Search: 702/57, 702 64- 65, 702/75, 702117-120, 702/123, 702/183, 324763-764, 438 17- 18, 327/408
• US Class Current: 702/183
• CPC Class Codes: G01R 31/2829 Testing of circuits in sensor or actuator systems testing of apparatus for measuring electric or magnetic variables G01R35/00; testing of indicating or recording apparatus G01D; in airbag systems B60R21/0173; checking gas analysers G01N33/007; monitoring or fail-safe circuits for electromagnets H01F7/1844

Abstract

A method and apparatus for sensing an aging effect on an integrated circuit using a sensor disposed on the integrated circuit and arranged to generate an output dependent on a condition of an element within the sensor. A processor operatively connected to the sensor is arranged to indicate a code dependent the output.

Claims

1. An integrated circuit, comprising:

a first sensor disposed on the integrated circuit and arranged to generate a first output dependent on an aging effect of a first element within the first sensor;

a processor operatively connected to the first sensor and arranged to indicate a code indicative of the aging effect; and

a circuit, separate from the first sensor, operatively connected to the processor,

wherein the code is usable to compensate for the aging effect of the circuit separate from the first sensor.

2. The integrated circuit of claim 1, further comprising:

a second sensor disposed on the integrated circuit and arranged to generate a second output dependent on an aging effect of a second element within the second sensor; and

a multiplexer operatively connected to the first sensor and the second sensor, wherein the multiplexer is arranged to select between at least the first output and the second output, and wherein the processor is arranged to indicate the code dependent on at least the first output and the second output.

3. The integrated circuit of claim 2, further comprising a voltage regulator operatively connected to the multiplexer and the processor.

4. The integrated circuit of claim 2, further comprising a voltage controlled oscillator operatively connected to the multiplexer and the processor.

5. The integrated circuit of claim 2, wherein the second sensor comprises a transistor biased at a voltage potential.

6. The integrated circuit of claim 2, wherein the multiplexer comprises an analog multiplexer.

7. The integrated circuit of claim 2, wherein the processor is arranged to select between the first output and the second output dependent on another circuit that requests the code.

8. The integrated circuit of claim 1, further comprising a memory operatively connected to the processor.

9. The integrated circuit of claim 1, wherein the processor comprises a counter.

10. The integrated circuit of claim 1, wherein the processor is operatively connected to at least one other circuit disposed on the integrated circuit.

11. The integrated circuit of claim 1, wherein the first sensor comprises a transistor biased at a voltage potential.

12. The integrated circuit of claim 1, wherein the first sensor comprises a ring oscillator and a duty-cycle adjustment circuit.

13. A method for determining an aging effect on an integrated circuit, comprising:

generating a first output dependent on an aging effect of a first element;

indicating a code dependent on generating, wherein the code is indicative of the aging effect; and

using the code to compensate for the aging effect of a circuit separate from the first element.

14. The method of claim 13, wherein generating the first output is dependent on a source to drain current of a first transistor biased at a first voltage potential.

15. The method of claim 13, wherein generating further comprising generating a second output dependent on a condition of a second element.

16. The method of claim 15, wherein generating the second output is dependent on a source to drain current of a second transistor biased at a second voltage potential.

17. The method of claim 15, further comprising selecting from at least the first output and the second output to produce a multiplexer output.

18. The method of claim 17, further comprising regulating a voltage potential of the multiplexer output.

19. The method of claim 17, further comprising generating a signal that oscillates at a frequency dependent on the multiplexer output.

20. The method of claim 13, wherein indicating is further dependent on stored information.

21. The method of claim 13, further comprising transferring the code to at least one other circuit disposed on the integrated circuit.

22. The method of claim 13, wherein indicating the code is dependent on measuring a duty-cycle.

23. An integrated circuit, comprising:

means for generating an output dependent on an aging effect of an element;

means for indicating a code dependent on the output, wherein the code is indicative of the aging effect; and

means for compensating for the aging effect of a circuit separate from the element dependent on the code.

24. The integrated circuit of claim 23, further comprising means for generating a signal whose duty-cycle is dependent on the output.

25. The integrated circuit of claim 23, further comprising means for generating a signal whose frequency is dependent on the output.