Automatic reset signal generator integrated into chipset and chipset with reset completion indication function
First Claim
1. A circuit for automatically resetting a central processing unit (CPU), said circuit comprising:
- a detector electrically connected to said CPU for receiving a specified signal from said CPU, said detector sending out a triggering signal when said specified signal is not received for a predetermined period of time; and
a reset signal generator comprising a sample and hold circuit electrically connected to said detector for generating a reset signal to reset said CPU by modifying a waveform of said triggering signal into said reset signal.
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Accused Products
Abstract
A circuit for automatically resetting a central processing unit (CPU) is provided. The circuit includes a detector and a reset signal generator. The detector is electrically connected to the CPU for receiving a specified signal from the CPU, and the detector sends out a triggering signal when the specified signal is not received for a predetermined period of time. The reset signal generator is electrically connected to the detector for generating a reset signal in response to the triggering signal. A chipset with a reset completion indication function is also provided. The chipset includes a plurality of functional circuits and a calculating and recording device.
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Citations
23 Claims
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1. A circuit for automatically resetting a central processing unit (CPU), said circuit comprising:
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a detector electrically connected to said CPU for receiving a specified signal from said CPU, said detector sending out a triggering signal when said specified signal is not received for a predetermined period of time; and a reset signal generator comprising a sample and hold circuit electrically connected to said detector for generating a reset signal to reset said CPU by modifying a waveform of said triggering signal into said reset signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A circuit for automatically resetting a central processing unit (CPU), said circuit;
- comprising;
a detector electrically connected to said CPU, sending out a triggering signal when detecting a specified operation of said CPU has suspended for a predetermined period of time; a reset signal generator electrically connected to said detector, and generating a reset signal in response to said triggering signal; and a multiplexer electrically connected to said reset signal generator and a chipset, and selecting one of said reset signal and an original reset signal from said chipset to be outputted to reset said CPU in response to a select signal.
- comprising;
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13. A chipset with a reset completion indication function, comprising:
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a plurality of functional circuits, respectively performing reset operations in response to reset signals, and outputting reset completion signals after completing said reset operations; and a calculating and recording device, calculating and recording said reset completion signals to indicate whether reset operations of said chipset are complete and which functional circuit has not been reset. - View Dependent Claims (14, 15, 16, 17, 18, 19, 20, 21, 22, 23)
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Specification